marlin bugfix + SKR + BLTOUCH

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/.gitattributes

@@ -0,0 +1 @@
+* text=auto eol=lf

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/format_code

@@ -0,0 +1,30 @@
+#!/usr/bin/env bash
+#
+# format_code [dir/file...]
+#
+
+HERE=`dirname $0`
+
+while [[ $# -gt 0 ]]; do
+
+  val="$1"
+
+  if [ -d "$val" ]; then
+
+    find $val -name *.cpp -exec "$HERE/uncrust" '{}' \;
+
+  elif [ -d "./Marlin/src/$val" ]; then
+
+    find "./Marlin/src/$val" -name *.cpp -exec "$HERE/uncrust" '{}' \;
+
+  elif [ -f "./Marlin/src/$val" ]; then
+
+    uncrust "./Marlin/src/$val"
+
+  elif [ -f "$val" ]; then
+
+    uncrust "$val"
+
+  fi
+
+done

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/generate_version

@@ -0,0 +1,144 @@
+#!/usr/bin/env bash
+#
+# generate_version
+#
+# Make a Version.h file to accompany CUSTOM_VERSION_FILE
+#
+
+DIR=${1:-"Marlin"}
+
+# MRCC3=$( git merge-base HEAD upstream/bugfix-2.0.x 2>/dev/null )
+# MRCC2=$( git merge-base HEAD upstream/bugfix-1.1.x 2>/dev/null )
+# MRCC1=$( git merge-base HEAD upstream/1.1.x 2>/dev/null )
+
+# BASE='?'
+# if [[ -n $MRCC3 && $MRCC3 != $MRCC2 ]]; then
+#   BASE=bugfix-2.0.x
+# elif [[ -n $MRCC2 ]]; then
+#   BASE=bugfix-1.1.x
+# elif [[ -n $MRCC1 ]]; then
+#   BASE=1.1.x
+# fi
+
+BUILDATE=$(date '+%s')
+DISTDATE=$(date '+%Y-%m-%d %H:%M')
+
+BRANCH=$(git -C "${DIR}" symbolic-ref -q --short HEAD)
+VERSION=$(git -C "${DIR}" describe --tags --first-parent 2>/dev/null)
+
+[ -z "${BRANCH}" ] && BRANCH=$(echo "${TRAVIS_BRANCH}")
+[ -z "${VERSION}" ] && VERSION=$(git -C "${DIR}" describe --tags --first-parent --always 2>/dev/null)
+
+SHORT_BUILD_VERSION=$(echo "${BRANCH}")
+DETAILED_BUILD_VERSION=$(echo "${BRANCH}-${VERSION}")
+
+# Gets some misc options from their defaults
+DEFAULT_MACHINE_UUID=$(awk -F'"' \
+  '/#define DEFAULT_MACHINE_UUID/{ print $2 }' < "${DIR}/Version.h")
+MACHINE_NAME=$(awk -F'"' \
+  '/#define MACHINE_NAME/{ print $2 }' < "${DIR}/Version.h")
+PROTOCOL_VERSION=$(awk -F'"' \
+  '/#define PROTOCOL_VERSION/{ print $2 }' < "${DIR}/Version.h")
+SOURCE_CODE_URL=$(awk -F'"' \
+  '/#define SOURCE_CODE_URL/{ print $2 }' < "${DIR}/Version.h")
+WEBSITE_URL=$(awk -F'"' \
+  '/#define WEBSITE_URL/{ print $2 }' < "${DIR}/Version.h")
+
+cat > "${DIR}/Version.h" <<EOF
+/**
+ * Marlin 3D Printer Firmware
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ *
+ * Based on Sprinter and grbl.
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+#pragma once
+
+/**
+ * THIS FILE IS AUTOMATICALLY GENERATED DO NOT MANUALLY EDIT IT.
+ * IT DOES NOT GET COMMITTED TO THE REPOSITORY.
+ *
+ * Branch: ${BRANCH}
+ * Version: ${VERSION}
+ */
+
+/**
+  * Marlin release version identifier
+  */
+#ifndef SHORT_BUILD_VERSION
+  #define SHORT_BUILD_VERSION "${SHORT_BUILD_VERSION}"
+#endif
+
+/**
+  * Verbose version identifier which should contain a reference to the location
+  * from where the binary was downloaded or the source code was compiled.
+  */
+#ifndef DETAILED_BUILD_VERSION
+  #define DETAILED_BUILD_VERSION "${DETAILED_BUILD_VERSION}"
+#endif
+
+/**
+  * The STRING_DISTRIBUTION_DATE represents when the binary file was built,
+  * here we define this default string as the date where the latest release
+  * version was tagged.
+  */
+#ifndef STRING_DISTRIBUTION_DATE
+  #define STRING_DISTRIBUTION_DATE "${DISTDATE}"
+#endif
+
+/**
+  * The protocol for communication to the host. Protocol indicates communication
+  * standards such as the use of ASCII, "echo:" and "error:" line prefixes, etc.
+  * (Other behaviors are given by the firmware version and capabilities report.)
+  */
+#ifndef PROTOCOL_VERSION
+  #define PROTOCOL_VERSION "${PROTOCOL_VERSION}"
+#endif
+
+/**
+  * Defines a generic printer name to be output to the LCD after booting Marlin.
+  */
+#ifndef MACHINE_NAME
+  #define MACHINE_NAME "${MACHINE_NAME}"
+#endif
+
+/**
+  * The SOURCE_CODE_URL is the location where users will find the Marlin Source
+  * Code which is installed on the device. In most cases —unless the manufacturer
+  * has a distinct Github fork— the Source Code URL should just be the main
+  * Marlin repository.
+  */
+#ifndef SOURCE_CODE_URL
+  #define SOURCE_CODE_URL "${SOURCE_CODE_URL}"
+#endif
+
+/**
+  * Default generic printer UUID.
+  */
+#ifndef DEFAULT_MACHINE_UUID
+  #define DEFAULT_MACHINE_UUID "${DEFAULT_MACHINE_UUID}"
+#endif
+
+/**
+  * The WEBSITE_URL is the location where users can get more information such as
+  * documentation about a specific Marlin release.
+  */
+#ifndef WEBSITE_URL
+  #define WEBSITE_URL "${WEBSITE_URL}"
+#endif
+
+EOF

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/opt_add

@@ -0,0 +1,3 @@
+#!/usr/bin/env bash
+
+eval "echo '#define ${@}' >>Marlin/Configuration_adv.h"

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/opt_disable

@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+
+# exit on first failure
+set -e
+
+SED=$(which gsed || which sed)
+
+for opt in "$@" ; do
+  # Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648
+  eval "${SED} -i '/\([[:blank:]]*\)\(\/\/\)*\([[:blank:]]*\)\(#define \b${opt}\b\)/{s//\1\3\/\/\4/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" ||
+  eval "${SED} -i '/\([[:blank:]]*\)\(\/\/\)*\([[:blank:]]*\)\(#define \b${opt}\b\)/{s//\1\3\/\/\4/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" ||
+  (echo "ERROR: opt_disable Can't find ${opt}" >&2 && exit 9)
+done

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/opt_enable

@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+
+# exit on first failure
+set -e
+
+SED=$(which gsed || which sed)
+
+for opt in "$@" ; do
+  # Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648
+  eval "${SED} -i '/\(\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" ||
+  eval "${SED} -i '/\(\/\/\)*[[:blank:]]*\(#define \b${opt}\b\)/{s//\2/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" ||
+  (echo "ERROR: opt_enable Can't find ${opt}" >&2 && exit 9)
+done

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/opt_set

@@ -0,0 +1,12 @@
+#!/usr/bin/env bash
+
+# exit on first failure
+set -e
+
+SED=$(which gsed || which sed)
+
+# Logic for returning nonzero based on answer here: https://stackoverflow.com/a/15966279/104648
+eval "${SED} -i '/\(\/\/\)*\([[:blank:]]*\)\(#define \b${1}\b\).*$/{s//\2\3 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration.h" ||
+eval "${SED} -i '/\(\/\/\)*\([[:blank:]]*\)\(#define \b${1}\b\).*$/{s//\2\3 ${2}/;h};\${x;/./{x;q0};x;q9}' Marlin/Configuration_adv.h" ||
+eval "echo '#define ${@}' >>Marlin/Configuration_adv.h" ||
+(echo "ERROR: opt_set Can't set or add ${1}" >&2 && exit 9)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/pins_set

@@ -0,0 +1,11 @@
+#!/usr/bin/env bash
+
+IFS='/' read -r -a PINPATH <<< "$1"
+DIR=${PINPATH[0]}
+NAM=${PINPATH[1]}
+PIN=$2
+VAL=$3
+
+SED=$(which gsed || which sed)
+eval "${SED} -i '/\(\/\/\)*\(#define \+${PIN}\b\).*$/{s//\2 ${VAL}/;h};\${x;/./{x;q0};x;q9}' Marlin/src/pins/$DIR/pins_${NAM}.h" ||
+(echo "ERROR: pins_set Can't find ${PIN}" >&2 && exit 9)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/restore_configs

@@ -0,0 +1,5 @@
+#!/usr/bin/env bash
+
+git checkout Marlin/Configuration*.h 2>/dev/null
+git checkout Marlin/src/pins/ramps/pins_RAMPS.h 2>/dev/null
+rm -f Marlin/_Bootscreen.h Marlin/_Statusscreen.h

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/uncrust

@@ -0,0 +1,16 @@
+#!/usr/bin/env bash
+#
+# Run uncrustify for a file in-place
+#
+
+TMPDIR=`mktemp -d`
+
+# Reformat a single file to tmp/
+uncrustify -l CPP -c ./buildroot/share/extras/uncrustify.cfg -f "$1" >$TMPDIR/uncrustify.out
+
+# Replace the original file
+cp "$TMPDIR/uncrustify.out" "$1"
+
+# Clean up, deliberately
+rm "$TMPDIR/uncrustify.out"
+rmdir "$TMPDIR"

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/bin/use_example_configs

@@ -0,0 +1,15 @@
+#!/usr/bin/env bash
+
+restore_configs
+
+EXAMPLES="https://raw.githubusercontent.com/MarlinFirmware/Configurations/bugfix-2.0.x/config/examples"
+
+cd Marlin
+
+wget -q "$EXAMPLES/$@/Configuration.h"     -O wgot && mv wgot Configuration.h
+wget -q "$EXAMPLES/$@/Configuration_adv.h" -O wgot && mv wgot Configuration_adv.h
+wget -q "$EXAMPLES/$@/_Bootscreen.h"       -O wgot && mv wgot _Bootscreen.h
+wget -q "$EXAMPLES/$@/_Statusscreen.h"     -O wgot && mv wgot _Statusscreen.h
+rm -f wgot
+
+cd - >/dev/null

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/etc/.astylerc

@@ -0,0 +1,23 @@
+--style=google
+--keep-one-line-blocks
+
+--indent=spaces=2
+--indent-preproc-block
+--indent-preproc-define
+--indent-col1-comments
+
+--remove-brackets
+--break-after-logical
+--delete-empty-lines
+
+--pad-oper
+--pad-header
+--unpad-paren
+--align-pointer=type
+--align-reference=type
+
+--attach-classes
+--attach-inlines
+--keep-one-line-statements
+
+--indent-namespaces

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/etc/udev/rules.d/99-platformio-udev.rules

@@ -0,0 +1,207 @@
+# Copyright (c) 2014-present PlatformIO <contact@platformio.org>
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+#####################################################################################
+#
+# INSTALLATION
+#
+# Please visit > http://docs.platformio.org/en/latest/faq.html#platformio-udev-rules
+#
+#####################################################################################
+
+#
+# Boards
+#
+
+# CP210X USB UART
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="10c4", ATTRS{idProduct}=="ea60", MODE:="0666"
+
+# FT232R USB UART
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE:="0666"
+
+# Prolific Technology, Inc. PL2303 Serial Port
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="067b", ATTRS{idProduct}=="2303", MODE:="0666"
+
+# QinHeng Electronics HL-340 USB-Serial adapter
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="1a86", ATTRS{idProduct}=="7523", MODE:="0666"
+
+# Arduino boards
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="[08][02]*", MODE:="0666"
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="2a03", ATTRS{idProduct}=="[08][02]*", MODE:="0666"
+
+# Arduino SAM-BA
+ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="6124", ENV{ID_MM_DEVICE_IGNORE}="1"
+ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="6124", ENV{MTP_NO_PROBE}="1"
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="6124", MODE:="0666"
+KERNEL=="ttyACM*", ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="6124", MODE:="0666"
+
+# Digistump boards
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="16d0", ATTRS{idProduct}=="0753", MODE:="0666"
+KERNEL=="ttyACM*", ATTRS{idVendor}=="16d0", ATTRS{idProduct}=="0753", MODE:="0666", ENV{ID_MM_DEVICE_IGNORE}="1"
+
+# STM32 discovery boards, with onboard st/linkv2
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374?", MODE:="0666"
+
+# USBtiny
+SUBSYSTEMS=="usb", ATTRS{idProduct}=="0c9f", ATTRS{idVendor}=="1781", MODE="0666"
+
+# USBasp V2.0
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="16c0", ATTRS{idProduct}=="05dc", MODE:="0666"
+
+# Teensy boards
+ATTRS{idVendor}=="16c0", ATTRS{idProduct}=="04[789]?", ENV{ID_MM_DEVICE_IGNORE}="1"
+ATTRS{idVendor}=="16c0", ATTRS{idProduct}=="04[789]?", ENV{MTP_NO_PROBE}="1"
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="16c0", ATTRS{idProduct}=="04[789]?", MODE:="0666"
+KERNEL=="ttyACM*", ATTRS{idVendor}=="16c0", ATTRS{idProduct}=="04[789]?", MODE:="0666"
+
+#TI Stellaris Launchpad
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="0666"
+
+#TI MSP430 Launchpad
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="0451", ATTRS{idProduct}=="f432", MODE="0666"
+
+
+#
+# Debuggers
+#
+
+# Black Magic Probe
+SUBSYSTEM=="tty", ATTRS{interface}=="Black Magic GDB Server"
+SUBSYSTEM=="tty", ATTRS{interface}=="Black Magic UART Port"
+
+# opendous and estick
+ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232/FT245 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT2232 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232H VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# DISTORTEC JTAG-lock-pick Tiny 2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TUMPA, TUMPA Lite
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# XDS100v2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Xverve Signalyzer Tool (DT-USB-ST), Signalyzer LITE (DT-USB-SLITE)
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca1", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris Evaluation Board FTDI (several)
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# egnite Turtelizer 2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Section5 ICEbear
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Amontec JTAGkey and JTAGkey-tiny
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI ICDI
+ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STLink v1
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STLink v2
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STLink v2-1
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hilscher NXHX Boards
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hitex STR9-comStick
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hitex STM32-PerformanceStick
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Altera USB Blaster
+ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Amontec JTAGkey-HiSpeed
+ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# SEGGER J-Link
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0102", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0103", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0104", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0105", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0107", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0108", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1012", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1013", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1014", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Raisonance RLink
+ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Debug Board for Neo1973
+ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-TINY
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-JTAG-EW
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-TINY-H
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-H
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# USBprog with OpenOCD firmware
+ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
+ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Marvell Sheevaplug
+ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Keil Software, Inc. ULink
+ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2710", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# CMSIS-DAP compatible adapters
+ATTRS{product}=="*CMSIS-DAP*", MODE="660", GROUP="plugdev", TAG+="uaccess"

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/BigTree_Btt002.json

@@ -0,0 +1,46 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407vgt6",
+    "variant": "BIGTREE_BTT002"
+  },
+  "debug": {
+    "jlink_device": "STM32F407VG",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd"
+  },
+  "frameworks": [
+    "arduino"
+  ],
+  "name": "STM32F407VG (192k RAM. 1024k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 131072,
+    "maximum_size": 1048576,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "offset_address": "0x8008000",
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407vg.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/BigTree_GTR_v1.json

@@ -0,0 +1,46 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407zgt6",
+    "variant": "BIGTREE_GTR_V1"
+  },
+  "debug": {
+    "jlink_device": "STM32F407ZG",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd"
+  },
+  "frameworks": [
+    "arduino"
+  ],
+  "name": "STM32F407ZG (192k RAM. 1024k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 196608,
+    "maximum_size": 1048576,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "offset_address": "0x8008000",
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407zg.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/BigTree_SKR_Pro.json

@@ -0,0 +1,46 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407zgt6",
+    "variant": "BIGTREE_SKR_PRO_1v1"
+  },
+  "debug": {
+    "jlink_device": "STM32F407ZG",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd"
+  },
+  "frameworks": [
+    "arduino"
+  ],
+  "name": "STM32F407ZG (192k RAM. 1024k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 196608,
+    "maximum_size": 1048576,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "offset_address": "0x8008000",
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407zg.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/FLYF407ZG.json

@@ -0,0 +1,64 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F407xx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407zgt6",
+    "variant": "FLY_F407ZG"
+  },
+  "debug": {
+    "jlink_device": "STM32F407ZG",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd",
+    "tools": {
+      "stlink": {
+        "server": {
+          "arguments": [
+            "-f",
+            "scripts/interface/stlink.cfg",
+            "-c",
+            "transport select hla_swd",
+            "-f",
+            "scripts/target/stm32f4x.cfg",
+            "-c",
+            "reset_config none"
+          ],
+          "executable": "bin/openocd",
+          "package": "tool-openocd"
+        }
+      }
+    }
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "STM32F407ZGT6(192k RAM. 1024k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 196608,
+    "maximum_size": 1048576,
+    "protocol": "dfu",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407ZG.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/MEEB_3DP.json

@@ -0,0 +1,53 @@
+{
+  "build": {
+    "core": "maple",
+    "cpu": "cortex-m3",
+    "extra_flags": "-DSTM32F103xE -DSTM32F1",
+    "f_cpu": "72000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x1EAF",
+        "0x0004"
+      ]
+    ],
+    "libopencm3": {
+      "ldscript": "stm32f103xc.ld"
+    },
+    "mcu": "stm32f103rct6",
+    "variant": "MEEB_3DP"
+  },
+  "debug": {
+    "jlink_device": "STM32F103RC",
+    "openocd_target": "stm32f1x",
+    "svd_path": "STM32F103xx.svd"
+  },
+  "frameworks": [
+    "arduino",
+    "cmsis",
+    "libopencm3",
+    "stm32cube"
+  ],
+  "name": "3D Printer control board for MEEB with 512k flash/rs422 bus/tmc2208 drivers",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 49152,
+    "maximum_size": 524288,
+    "protocol": "dfu",
+    "protocols": [
+      "jlink",
+      "stlink",
+      "blackmagic",
+      "serial",
+      "dfu"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "https://github.com/ccrobot-online/MEEB_3DP",
+  "vendor": "CCROBOT-ONLINE"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/STEVAL_STM32F401VE.json

@@ -0,0 +1,65 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F401xx",
+    "f_cpu": "84000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "ldscript": "stm32f401xe.ld",
+    "mcu": "stm32f401vet6",
+    "variant": "STEVAL_F401VE"
+  },
+  "debug": {
+    "jlink_device": "STM32F401VE",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd",
+    "tools": {
+      "stlink": {
+        "server": {
+          "arguments": [
+            "-f",
+            "scripts/interface/stlink.cfg",
+            "-c",
+            "transport select hla_swd",
+            "-f",
+            "scripts/target/stm32f4x.cfg",
+            "-c",
+            "reset_config none"
+          ],
+          "executable": "bin/openocd",
+          "package": "tool-openocd"
+        }
+      }
+    }
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "STM32F401VE (96k RAM. 512k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 98304,
+    "maximum_size": 514288,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "https://www.st.com/en/evaluation-tools/steval-3dp001v1.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/at90usb1286.json

@@ -0,0 +1,21 @@
+{
+  "build": {
+    "core": "teensy",
+    "extra_flags": "-DTEENSY2PP  -fsingle-precision-constant",
+    "f_cpu": "16000000L",
+    "mcu": "at90usb1286"
+  },
+  "frameworks": [
+    "arduino"
+  ],
+  "platform": "teensy",
+  "name": "Atmel AT90USB1286 based",
+  "upload": {
+    "maximum_ram_size": 8192,
+    "maximum_size": 122880,
+    "require_upload_port": true,
+    "protocol": ""
+  },
+  "url": "https://github.com/MarlinFirmware/Marlin",
+  "vendor": "various"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/blackSTM32F407VET6.json

@@ -0,0 +1,64 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F407xx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407vet6",
+    "variant": "MARLIN_F407VE"
+  },
+  "debug": {
+    "jlink_device": "STM32F407VE",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd",
+    "tools": {
+      "stlink": {
+        "server": {
+          "arguments": [
+            "-f",
+            "scripts/interface/stlink.cfg",
+            "-c",
+            "transport select hla_swd",
+            "-f",
+            "scripts/target/stm32f4x.cfg",
+            "-c",
+            "reset_config none"
+          ],
+          "executable": "bin/openocd",
+          "package": "tool-openocd"
+        }
+      }
+    }
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "STM32F407VE (192k RAM. 512k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 131072,
+    "maximum_size": 514288,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407ve.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/chitu_f103.json

@@ -0,0 +1,48 @@
+{
+  "build": {
+    "core": "maple",
+    "cpu": "cortex-m3",
+    "extra_flags": "-DSTM32F103xE -DSTM32F1",
+    "f_cpu": "72000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x1EAF",
+        "0x0004"
+      ]
+    ],
+    "mcu": "stm32f103zet6",
+    "variant": "CHITU_F103",
+    "ldscript": "chitu_f103.ld"
+  },
+  "debug": {
+    "jlink_device": "STM32F103ZE",
+    "openocd_target": "stm32f1x",
+    "svd_path": "STM32F103xx.svd"
+  },
+  "frameworks": [
+    "arduino"
+  ],
+  "name": "CHITU STM32F103Z (64k RAM. 512k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 60536,
+    "maximum_size": 480288,
+    "protocol": "stlink",
+    "protocols": [
+      "jlink",
+      "stlink",
+      "blackmagic",
+      "serial",
+      "dfu"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f103ze.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/fysetc_s6.json

@@ -0,0 +1,35 @@
+{
+  "build": {
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F446xx",
+    "f_cpu": "180000000L",
+    "mcu": "stm32f446ret6",
+    "variant": "FYSETC_S6"
+  },
+  "connectivity": [
+    "can"
+  ],
+  "debug": {
+    "jlink_device": "STM32F446RE",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F446x.svd"
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "3D Printer control board",
+  "upload": {
+    "maximum_ram_size": 131072,
+    "maximum_size": 524288,
+    "protocol": "stlink",
+    "protocols": [
+      "jlink",
+      "stlink",
+      "blackmagic",
+      "serial"
+    ]
+  },
+  "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html",
+  "vendor": "FYSETC"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/malyanM200.json

@@ -0,0 +1,35 @@
+{
+  "build": {
+    "core": "maple",
+    "cpu": "cortex-m3",
+    "extra_flags": "-DARDUINO_GENERIC_STM32F103C -DMCU_STM32F103CB",
+    "f_cpu": "72000000L",
+    "hwids": [
+        ["0x1EAF", "0x0003"],
+        ["0x1EAF", "0x0004"]
+    ],
+    "ldscript": "jtagOffset.ld",
+    "mcu": "stm32f103cb",
+    "variant": "malyanM200",
+    "vec_tab_addr": "0x8002000"
+  },
+  "debug": {
+    "jlink_device": "STM32F103CB",
+    "openocd_target": "stm32f1x",
+    "svd_path": "STM32F103xx.svd"
+  },
+  "platform": "ststm32",
+  "frameworks": ["arduino"],
+  "name": "Malyan STM32F103CB (20k RAM. 128k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 20480,
+    "maximum_size": 131072,
+    "protocol": "serial",
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32f1-series/stm32f103/stm32f103cb.html",
+  "vendor": "Generic"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/boards/malyanM200v2.json

@@ -0,0 +1,41 @@
+{
+  "build": {
+    "cpu": "cortex-m0",
+    "extra_flags": "-DSTM32F070xB",
+    "f_cpu": "48000000L",
+    "mcu": "stm32f070rbt6",
+    "variant": "MALYANM200_F070CB",
+    "vec_tab_addr": "0x8002000"
+  },
+  "debug": {
+    "jlink_device": "STM32F070RB",
+    "default_tools": [
+      "stlink"
+    ],
+    "onboard_tools": [
+      "stlink"
+    ],
+    "openocd_board": "st_nucleo_f0",
+    "openocd_target": "stm32f0x"
+  },
+  "platform": "ststm32",
+  "frameworks": [
+    "mbed",
+    "stm32cube",
+    "arduino"
+  ],
+  "name": "Malyan M200 V2/Delta",
+  "upload": {
+    "maximum_ram_size": 16384,
+    "maximum_size": 131072,
+    "protocol": "mbed",
+    "protocols": [
+      "jlink",
+      "stlink",
+      "blackmagic",
+      "mbed"
+    ]
+  },
+  "url": "https://developer.mbed.org/platforms/ST-Nucleo-F070RB/",
+  "vendor": "Malyan"
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08002000, LENGTH = 512K - 8K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_256K.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 256K - 28K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_512K.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/STM32F103RE_SKR_E3_DIP.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/STM32F103VE_longer.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08010000, LENGTH = 512K - 64K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/chitu_f103.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 60K
+  rom (rx)  : ORIGIN = 0x08008800, LENGTH = 512K - 34K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/creality.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/fysetc_stm32f103rc.ld

@@ -0,0 +1,18 @@
+/*
+ * Linker script for Generic STM32F103RC boards, using the generic bootloader (which takes the lower 8k of memory)
+ */
+
+MEMORY
+{
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
+	rom (rx)  : ORIGIN = 0x08008000, LENGTH = 256K - 32K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/jgaurora_a5s_a1.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 64K - 3K
+  rom (rx)  : ORIGIN = 0x0800A000, LENGTH = 512K - 40K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_e3.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 256K - 20K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 256K - 20K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_lite3.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
+  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 256K - 20K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_mini.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K - 4K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_nano.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/ldscripts/mks_robin_pro.ld

@@ -0,0 +1,14 @@
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - 40
+  rom (rx)  : ORIGIN = 0x08007000, LENGTH = 512K - 28K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STEVAL__F401XX.py

@@ -0,0 +1,9 @@
+import os
+Import("env")
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/variants/STEVAL_F401VE/ldscript.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py

@@ -0,0 +1,59 @@
+try:
+    import configparser
+except ImportError:
+    import ConfigParser as configparser
+
+import os
+Import("env", "projenv")
+# access to global build environment
+print(env)
+# access to project build environment (is used source files in "src" folder)
+print(projenv)
+
+config = configparser.ConfigParser()
+config.read("platformio.ini")
+
+#com_port = config.get("env:STM32F103RC_meeb", "upload_port")
+#print('Use the {0:s} to reboot the board to dfu mode.'.format(com_port))
+
+#
+# Upload actions
+#
+
+def before_upload(source, target, env):
+    print("before_upload")
+    # do some actions
+    # use com_port
+    #
+    env.Execute("pwd")
+
+def after_upload(source, target, env):
+    print("after_upload")
+    # do some actions
+    #
+    #
+    env.Execute("pwd")
+
+print("Current build targets", map(str, BUILD_TARGETS))
+
+env.AddPreAction("upload", before_upload)
+env.AddPostAction("upload", after_upload)
+
+flash_size = 0
+vect_tab_addr = 0
+
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        vect_tab_addr = define[1]
+    if define[0] == "STM32_FLASH_SIZE":
+        flash_size = define[1]
+
+print('Use the {0:s} address as the marlin app entry point.'.format(vect_tab_addr))
+print('Use the {0:d}KB flash version of stm32f103rct6 chip.'.format(flash_size))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F103RC_SKR_MINI.py

@@ -0,0 +1,20 @@
+import os
+Import("env")
+
+STM32_FLASH_SIZE = 256
+
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+    if define[0] == "STM32_FLASH_SIZE":
+        STM32_FLASH_SIZE = define[1]
+
+# Relocate firmware from 0x08000000 to 0x08007000
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RC_SKR_MINI_" + str(STM32_FLASH_SIZE) + "K.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py

@@ -0,0 +1,36 @@
+import os
+from os.path import join
+from os.path import expandvars
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08008000
+#for define in env['CPPDEFINES']:
+#    if define[0] == "VECT_TAB_ADDR":
+#        env['CPPDEFINES'].remove(define)
+#env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08008000"))
+
+#custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/fysetc_stm32f103rc.ld")
+#for i, flag in enumerate(env["LINKFLAGS"]):
+#    if "-Wl,-T" in flag:
+#        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+#    elif flag == "-T":
+#        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+# Custom HEX from ELF
+env.AddPostAction(
+	join("$BUILD_DIR","${PROGNAME}.elf"),
+	env.VerboseAction(" ".join([
+		"$OBJCOPY", "-O ihex", "$TARGET", # TARGET=.pio/build/fysetc_STM32F1/firmware.elf
+		"\"" + join("$BUILD_DIR","${PROGNAME}.hex") + "\"", # Note: $BUILD_DIR is a full path
+	]), "Building $TARGET"))
+
+# In-line command with arguments
+UPLOAD_TOOL="stm32flash"
+platform = env.PioPlatform()
+if platform.get_package_dir("tool-stm32duino") != None:
+	UPLOAD_TOOL=expandvars("\"" + join(platform.get_package_dir("tool-stm32duino"),"stm32flash","stm32flash") + "\"")
+
+env.Replace(
+	UPLOADER=UPLOAD_TOOL,
+	UPLOADCMD=expandvars(UPLOAD_TOOL + " -v -i rts,-dtr,dtr -R -b 115200 -g 0x8000000 -w \"" + join("$BUILD_DIR","${PROGNAME}.hex")+"\"" + " $UPLOAD_PORT")
+)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F103RE_SKR_E3_DIP.py

@@ -0,0 +1,16 @@
+import os
+Import("env")
+
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+
+# Relocate firmware from 0x08000000 to 0x08007000
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RE_SKR_E3_DIP.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py

@@ -0,0 +1,33 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08010000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08010000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103VE_longer.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Rename ${PROGNAME}.bin and save it as 'project.bin' (No encryption on the Longer3D)
+def encrypt(source, target, env):
+    firmware = open(target[0].path, "rb")
+    marlin_alfa = open(target[0].dir.path +'/project.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            marlin_alfa.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        marlin_alfa.close()
+
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py

@@ -0,0 +1,34 @@
+import os,shutil
+from SCons.Script import DefaultEnvironment
+from platformio import util
+
+def copytree(src, dst, symlinks=False, ignore=None):
+    for item in os.listdir(src):
+        s = os.path.join(src, item)
+        d = os.path.join(dst, item)
+        if os.path.isdir(s):
+            shutil.copytree(s, d, symlinks, ignore)
+        else:
+            shutil.copy2(s, d)
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+board = env.BoardConfig()
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32-maple")
+assert os.path.isdir(FRAMEWORK_DIR)
+assert os.path.isdir("buildroot/share/PlatformIO/variants")
+
+variant = board.get("build.variant")
+variant_dir = os.path.join(FRAMEWORK_DIR, "STM32F1", "variants", variant)
+
+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
+assert os.path.isdir(source_dir)
+
+if os.path.isdir(variant_dir):
+    shutil.rmtree(variant_dir)
+
+if not os.path.isdir(variant_dir):
+    os.mkdir(variant_dir)
+
+copytree(source_dir, variant_dir)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/chitu_crypt.py

@@ -0,0 +1,127 @@
+Import("env")
+import os
+import random
+import struct
+import uuid
+
+# Relocate firmware from 0x08000000 to 0x08008800
+env['CPPDEFINES'].remove(("VECT_TAB_ADDR", "0x8000000"))
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08008800"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/chitu_f103.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+def calculate_crc(contents, seed):
+    accumulating_xor_value = seed;
+
+    for i in range(0, len(contents), 4):
+        value = struct.unpack('<I', contents[ i : i + 4])[0]
+        accumulating_xor_value = accumulating_xor_value ^ value
+    return accumulating_xor_value
+
+def xor_block(r0, r1, block_number, block_size, file_key):
+    # This is the loop counter
+    loop_counter = 0x0
+
+    # This is the key length
+    key_length = 0x18
+
+    # This is an initial seed
+    xor_seed = 0x4bad
+
+    # This is the block counter
+    block_number = xor_seed * block_number
+
+    #load the xor key from the file
+    r7 =  file_key
+
+    for loop_counter in range(0, block_size):
+        # meant to make sure different bits of the key are used.
+        xor_seed = int(loop_counter/key_length)
+
+        # IP is a scratch register / R12
+        ip = loop_counter - (key_length * xor_seed)
+
+        # xor_seed = (loop_counter * loop_counter) + block_number
+        xor_seed = (loop_counter * loop_counter) + block_number
+
+        # shift the xor_seed left by the bits in IP.
+        xor_seed = xor_seed >> ip
+
+        # load a byte into IP
+        ip = r0[loop_counter]
+
+        # XOR the seed with r7
+        xor_seed = xor_seed ^ r7
+
+        # and then with IP
+        xor_seed = xor_seed ^ ip
+
+        #Now store the byte back
+        r1[loop_counter] = xor_seed & 0xFF
+
+        #increment the loop_counter
+        loop_counter = loop_counter + 1
+
+
+def encrypt_file(input, output_file, file_length):
+    input_file = bytearray(input.read())
+    block_size = 0x800
+    key_length = 0x18
+
+    uid_value = uuid.uuid4()
+    file_key = int(uid_value.hex[0:8], 16)
+
+    xor_crc = 0xef3d4323;
+
+    # the input file is exepcted to be in chunks of 0x800
+    # so round the size
+    while len(input_file) % block_size != 0:
+        input_file.extend(b'0x0')
+
+    # write the file header
+    output_file.write(struct.pack(">I", 0x443D2D3F))
+    # encrypt the contents using a known file header key
+
+    # write the file_key
+    output_file.write(struct.pack("<I", file_key))
+
+    #TODO - how to enforce that the firmware aligns to block boundaries?
+    block_count = int(len(input_file) / block_size)
+    print ("Block Count is ", block_count)
+    for block_number in range(0, block_count):
+        block_offset = (block_number * block_size)
+        block_end = block_offset + block_size
+        block_array = bytearray(input_file[block_offset: block_end])
+        xor_block(block_array, block_array, block_number, block_size, file_key)
+        for n in range (0, block_size):
+            input_file[block_offset + n] = block_array[n]
+
+        # update the expected CRC value.
+        xor_crc = calculate_crc(block_array, xor_crc)
+
+    # write CRC
+    output_file.write(struct.pack("<I", xor_crc))
+
+    # finally, append the encrypted results.
+    output_file.write(input_file)
+    return
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'update.cbd'
+def encrypt(source, target, env):
+    firmware = open(target[0].path, "rb")
+    update = open(target[0].dir.path +'/update.cbd', "wb")
+    length = os.path.getsize(target[0].path)
+
+    encrypt_file(firmware, update, length)
+
+    firmware.close()
+    update.close()
+
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/common-cxxflags.py

@@ -0,0 +1,12 @@
+#
+# common-cxxflags.py
+# Convenience script to apply customizations to CPP flags
+#
+Import("env")
+env.Append(CXXFLAGS=[
+  "-Wno-register"
+  #"-Wno-incompatible-pointer-types",
+  #"-Wno-unused-const-variable",
+  #"-Wno-maybe-uninitialized",
+  #"-Wno-sign-compare"
+])

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/creality.py

@@ -0,0 +1,16 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/creality.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/fysetc_STM32S6.py

@@ -0,0 +1,33 @@
+from os.path import join
+Import("env")
+
+import os,shutil
+from SCons.Script import DefaultEnvironment
+from platformio import util
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+board = env.BoardConfig()
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
+#FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32@3.10500.190327")
+CMSIS_DIR = os.path.join(FRAMEWORK_DIR, "CMSIS", "CMSIS")
+assert os.path.isdir(FRAMEWORK_DIR)
+assert os.path.isdir(CMSIS_DIR)
+assert os.path.isdir("buildroot/share/PlatformIO/variants")
+
+mcu_type = board.get("build.mcu")[:-2]
+variant = board.get("build.variant")
+series = mcu_type[:7].upper() + "xx"
+variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
+
+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
+assert os.path.isdir(source_dir)
+
+if not os.path.isdir(variant_dir):
+    os.mkdir(variant_dir)
+
+for file_name in os.listdir(source_dir):
+    full_file_name = os.path.join(source_dir, file_name)
+    if os.path.isfile(full_file_name):
+        shutil.copy(full_file_name, variant_dir)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/generic_create_variant.py

@@ -0,0 +1,27 @@
+import os,shutil
+from SCons.Script import DefaultEnvironment
+from platformio import util
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+board = env.BoardConfig()
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
+assert os.path.isdir(FRAMEWORK_DIR)
+assert os.path.isdir("buildroot/share/PlatformIO/variants")
+
+mcu_type = board.get("build.mcu")[:-2]
+variant = board.get("build.variant")
+series = mcu_type[:7].upper() + "xx"
+variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
+
+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
+assert os.path.isdir(source_dir)
+
+if not os.path.isdir(variant_dir):
+    os.mkdir(variant_dir)
+
+for file_name in os.listdir(source_dir):
+    full_file_name = os.path.join(source_dir, file_name)
+    if os.path.isfile(full_file_name):
+        shutil.copy(full_file_name, variant_dir)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/jgaurora_a5s_a1_with_bootloader.py

@@ -0,0 +1,48 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x0800A000
+env['CPPDEFINES'].remove(("VECT_TAB_ADDR", "0x8000000"))
+#alternatively, for STSTM <=5.1.0 use line below
+#env['CPPDEFINES'].remove(("VECT_TAB_ADDR", 134217728))
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x0800A000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/jgaurora_a5s_a1.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+#append ${PROGNAME}.bin firmware after bootloader and save it as 'jgaurora_firmware.bin'
+def addboot(source,target,env):
+	firmware = open(target[0].path, "rb")
+	lengthfirmware = os.path.getsize(target[0].path)
+	bootloader_dir = "buildroot/share/PlatformIO/scripts/jgaurora_bootloader.bin"
+	bootloader = open(bootloader_dir, "rb")
+	lengthbootloader = os.path.getsize(bootloader_dir)
+	firmware_with_boothloader_dir = target[0].dir.path +'/firmware_with_bootloader.bin'
+	if os.path.exists(firmware_with_boothloader_dir):
+		os.remove(firmware_with_boothloader_dir)
+	firmwareimage = open(firmware_with_boothloader_dir, "wb")
+	position = 0
+	while position < lengthbootloader:
+		byte = bootloader.read(1)
+		firmwareimage.write(byte)
+		position += 1
+	position = 0
+	while position < lengthfirmware:
+		byte = firmware.read(1)
+		firmwareimage.write(byte)
+		position += 1
+	bootloader.close()
+	firmware.close()
+	firmwareimage.close()
+	firmware_without_bootloader_dir = target[0].dir.path+'/firmware_for_sd_upload.bin'
+	if os.path.exists(firmware_without_bootloader_dir):
+		os.remove(firmware_without_bootloader_dir)
+	os.rename(target[0].path, firmware_without_bootloader_dir)
+	#os.rename(target[0].dir.path+'/firmware_with_bootloader.bin', target[0].dir.path+'/firmware.bin')
+
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", addboot);
+

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin.py

@@ -0,0 +1,39 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+# Encrypt ${PROGNAME}.bin and save it as 'Robin.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_e3.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08005000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_e3.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'mksLite.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin_e3.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_lite.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08005000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'mksLite.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/mksLite.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_lite3.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08005000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08005000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_lite.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'mksLite.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/mksLite3.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_mini.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_mini.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'Robin_mini.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin_mini.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_nano.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_nano.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'Robin_nano.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin_nano.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_nano35.py

@@ -0,0 +1,40 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_nano.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+
+# Encrypt ${PROGNAME}.bin and save it as 'Robin_nano35.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin_nano35.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/scripts/mks_robin_pro.py

@@ -0,0 +1,39 @@
+import os
+Import("env")
+
+# Relocate firmware from 0x08000000 to 0x08007000
+for define in env['CPPDEFINES']:
+    if define[0] == "VECT_TAB_ADDR":
+        env['CPPDEFINES'].remove(define)
+env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08007000"))
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/mks_robin_pro.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+    if "-Wl,-T" in flag:
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+    elif flag == "-T":
+        env["LINKFLAGS"][i + 1] = custom_ld_script
+
+# Encrypt ${PROGNAME}.bin and save it as 'Robin.bin'
+def encrypt(source, target, env):
+    import sys
+
+    key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E]
+
+    firmware = open(target[0].path, "rb")
+    robin = open(target[0].dir.path +'/Robin_pro.bin', "wb")
+    length = os.path.getsize(target[0].path)
+    position = 0
+    try:
+        while position < length:
+            byte = firmware.read(1)
+            if position >= 320 and position < 31040:
+                byte = chr(ord(byte) ^ key[position & 31])
+                if sys.version_info[0] > 2:
+                    byte = bytes(byte, 'latin1')
+            robin.write(byte)
+            position += 1
+    finally:
+        firmware.close()
+        robin.close()
+env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PeripheralPins.c

@@ -0,0 +1,347 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
+ */
+#include <Arduino.h>
+#include <PeripheralPins.h>
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used by default.
+ *       If you change them, you should know what you're doing first.
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+const PinMap PinMap_ADC[] = {
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0      E0_DIR
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1      BLTOUCH_2
+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2      BLTOUCH_4
+  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3      E1_EN
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4      TF_SS
+  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5      TF_SCLK
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6      TF_MISO
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7      LED
+  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8      HEATER2
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9      HEATER0
+  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10    Z_EN
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11    EXP_14
+  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12    Z_DIR
+  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13    E0_EN
+  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14    EXP_8
+  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15    EXP_7
+
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio, 24 ADC
+    {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9    TH_0
+    {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14  TH_1
+    {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15  TH_2
+    {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4    TH_3
+    {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5    EXP_13
+    {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6    EXP_3
+    {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7    EXP_6
+    {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8    EXP_5
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+const PinMap PinMap_DAC[] = {
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+  {NC,    NP,    0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SDA[] = {
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+const PinMap PinMap_PWM[] = {
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4    HEATER0
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3    HEATER1
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3    HEATER2
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1    BED
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3    FAN0
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1    FAN1
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2    FAN2
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4    EXTENSION1-4
+
+  /**
+   * Unused by specifications on BTT002. (PLEASE CONFIRM)
+   * Uncomment the corresponding line if you want to have HardwarePWM on some pins.
+   * WARNING: check timers' usage first to avoid conflicts.
+   * If you don't know what you're doing leave things as they are or you WILL break something (including hardware)
+   * If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you.
+   */
+  //{PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  //{PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2  BLTOUCH is a "servo"
+  //{PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  //{PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3  BLTOUCH is a "servo"
+  //{PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  //{PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  //{PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  //{PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  //{PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  //{PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  //{PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  //{PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  //{PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  //{PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  //{PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  //{PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  //{PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  //{PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+  //{PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+  //{PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  //{PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  //{PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  //{PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  //{PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  //{PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+    //{PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+    //{PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+    //{PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_TX[] = {
+  {PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RX[] = {
+  {PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RTS[] = {
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    {PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_CTS[] = {
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    {PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    {PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#error "CAN bus isn't available on this board. Driver should be disabled."
+#endif
+
+//*** ETHERNET ***
+#ifdef HAL_ETH_MODULE_ENABLED
+#error "Ethernet port isn't available on this board. Driver should be disabled."
+#endif
+
+//*** No QUADSPI ***
+
+//*** USB ***
+#ifdef HAL_PCD_MODULE_ENABLED
+const PinMap PinMap_USB_OTG_FS[] = {
+  //{PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF   used by LCD
+  //{PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)},     // USB_OTG_FS_VBUS  available on wifi port, if empty
+  //{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID    available on UART1_RX if not used
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_USB_OTG_HS[] = { /*
+  #ifdef USE_USB_HS_IN_FS
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+    {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
+    {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
+  #else
+    #error "USB in HS mode isn't supported by the board"
+    {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
+    {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
+    {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
+    {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
+    {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
+    {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
+    {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
+    {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
+  #endif // USE_USB_HS_IN_FS
+  */
+  {NC,    NP,    0}
+};
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/PinNamesVar.h

@@ -0,0 +1,50 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+  USB_OTG_FS_SOF      = PA_8,
+  USB_OTG_FS_VBUS     = PA_9,
+  USB_OTG_FS_ID       = PA_10,
+  USB_OTG_FS_DM       = PA_11,
+  USB_OTG_FS_DP       = PA_12,
+  USB_OTG_HS_ULPI_D0  = PA_3,
+  USB_OTG_HS_SOF      = PA_4,
+  USB_OTG_HS_ULPI_CK  = PA_5,
+  USB_OTG_HS_ULPI_D1  = PB_0,
+  USB_OTG_HS_ULPI_D2  = PB_1,
+  USB_OTG_HS_ULPI_D7  = PB_5,
+  USB_OTG_HS_ULPI_D3  = PB_10,
+  USB_OTG_HS_ULPI_D4  = PB_11,
+  USB_OTG_HS_ID       = PB_12,
+  USB_OTG_HS_ULPI_D5  = PB_12,
+  USB_OTG_HS_ULPI_D6  = PB_13,
+  USB_OTG_HS_VBUS     = PB_13,
+  USB_OTG_HS_DM       = PB_14,
+  USB_OTG_HS_DP       = PB_15,
+  USB_OTG_HS_ULPI_STP = PC_0,
+  USB_OTG_HS_ULPI_DIR = PC_2,
+  USB_OTG_HS_ULPI_NXT = PC_3,
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/hal_conf_extra.h

@@ -0,0 +1,52 @@
+#pragma once
+
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED Real Time Clock...do we use it?
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED // by default
+//#define HAL_PCD_MODULE_ENABLED  // Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
+
+#undef HAL_SD_MODULE_ENABLED
+#undef HAL_DAC_MODULE_ENABLED
+#undef HAL_FLASH_MODULE_ENABLED
+#undef HAL_CAN_MODULE_ENABLED
+#undef HAL_CAN_LEGACY_MODULE_ENABLED
+#undef HAL_CEC_MODULE_ENABLED
+#undef HAL_CRYP_MODULE_ENABLED
+#undef HAL_DCMI_MODULE_ENABLED
+#undef HAL_DMA2D_MODULE_ENABLED
+#undef HAL_ETH_MODULE_ENABLED
+#undef HAL_NAND_MODULE_ENABLED
+#undef HAL_NOR_MODULE_ENABLED
+#undef HAL_PCCARD_MODULE_ENABLED
+#undef HAL_SRAM_MODULE_ENABLED
+#undef HAL_SDRAM_MODULE_ENABLED
+#undef HAL_HASH_MODULE_ENABLED
+#undef HAL_EXTI_MODULE_ENABLED
+#undef HAL_SMBUS_MODULE_ENABLED
+#undef HAL_I2S_MODULE_ENABLED
+#undef HAL_IWDG_MODULE_ENABLED
+#undef HAL_LTDC_MODULE_ENABLED
+#undef HAL_DSI_MODULE_ENABLED
+#undef HAL_QSPI_MODULE_ENABLED
+#undef HAL_RNG_MODULE_ENABLED
+#undef HAL_SAI_MODULE_ENABLED
+#undef HAL_IRDA_MODULE_ENABLED
+#undef HAL_SMARTCARD_MODULE_ENABLED
+#undef HAL_WWDG_MODULE_ENABLED
+#undef HAL_HCD_MODULE_ENABLED
+#undef HAL_FMPI2C_MODULE_ENABLED
+#undef HAL_SPDIFRX_MODULE_ENABLED
+#undef HAL_DFSDM_MODULE_ENABLED
+#undef HAL_LPTIM_MODULE_ENABLED
+#undef HAL_MMC_MODULE_ENABLED

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/ldscript.ld

@@ -0,0 +1,204 @@
+/*
+*****************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F407ZGTx Device with
+**                1024KByte FLASH, 128KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of Ac6 nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 1024K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+   *
+   * IMPORTANT NOTE!
+   * If initialized variables will be placed in this section,
+   * the startup code needs to be modified to copy the init-values.
+   */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(4);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(4);
+  } >RAM
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/variant.cpp

@@ -0,0 +1,260 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Pin number
+// This array allows to wrap Arduino pin number(Dx or x)
+// to STM32 PinName (PX_n)
+const PinName digitalPin[] = {
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  PC_13, //D0
+  PC_14, //D1  - OSC32_IN
+  PC_15, //D2  - OSC32_OUT
+  PH_0,  //D3  - OSC_IN
+  PH_1,  //D4  - OSC_OUT
+  PB_2,  //D5  - BOOT1
+  PB_10, //D6  - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  PB_11, //D7  - 1:I2C2_SDA / USART3_RX / TIM2_CH4
+  PB_12, //D8  - 1:SPI2_NSS / OTG_HS_ID
+  PB_13, //D9  - 1:SPI2_SCK  2:OTG_HS_VBUS
+  PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  PC_6,  //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  PC_7,  //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  PC_8,  //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  PC_9,  //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  PA_8,  //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  PA_9,  //D17 - 1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
+  PA_12, //D20 - 1:OTG_FS_DP
+  PA_13, //D21 - 0:JTMS-SWDIO
+  PA_14, //D22 - 0:JTCK-SWCLK
+  PA_15, //D23 - 0:JTDI  1:SPI3_NSS / SPI1_NSS
+  PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
+  PD_2,  //D27 - 1:UART5_RX / SDIO_CMD
+  PB_3,  //D28 - 0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  PB_4,  //D29 - 0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  PB_5,  //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  PB_6,  //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  PB_7,  //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  PB_8,  //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  PB_9,  //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  PA_0,  //D35/A0 - 1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  PA_1,  //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  PA_2,  //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  PA_3,  //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  PA_4,  //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  PA_5,  //D40/A5 - NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  PA_6,  //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  PA_7,  //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  PB_0,  //D43/A8 - 1:TIM3_CH3  2:ADC12_IN8
+  PB_1,  //D44/A9 - 1:TIM3_CH4  2:ADC12_IN9
+  PC_0,  //D45/A10 - 1:  2:ADC123_IN10
+  PC_1,  //D46/A11 - 1:  2:ADC123_IN11
+  PC_2,  //D47/A12 - 1:SPI2_MISO  2:ADC123_IN12
+  PC_3,  //D48/A13 - 1:SPI2_MOSI  2:ADC123_IN13
+  PC_4,  //D49/A14 - 1:  2:ADC12_IN14
+  PC_5,  //D50/A15 - 1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    PF_3,  //D51/A16 - 1:FSMC_A3  2:ADC3_IN9
+    PF_4,  //D52/A17 - 1:FSMC_A4  2:ADC3_IN14
+    PF_5,  //D53/A18 - 1:FSMC_A5  2:ADC3_IN15
+    PF_6,  //D54/A19 - 1:TIM10_CH1  2:ADC3_IN4
+    PF_7,  //D55/A20 - 1:TIM11_CH1  2:ADC3_IN5
+    PF_8,  //D56/A21 - 1:TIM13_CH1  2:ADC3_IN6
+    PF_9,  //D57/A22 - 1;TIM14_CH1  2:ADC3_IN7
+    PF_10, //D58/A23 - 2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  PE_2,  //D59 - 1:FSMC_A23
+  PE_3,  //D60 - 1:FSMC_A19
+  PE_4,  //D61 - 1:FSMC_A20
+  PE_5,  //D62 - 1:FSMC_A21
+  PE_6,  //D63 - 1:FSMC_A22
+  PE_7,  //D64 - 1:FSMC_D4
+  PE_8,  //D65 - 1:FSMC_D5
+  PE_9,  //D66 - 1:FSMC_D6 / TIM1_CH1
+  PE_10, //D67 - 1:FSMC_D7
+  PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
+  PE_12, //D69 - 1:FSMC_D9
+  PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
+  PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
+  PE_15, //D72 - 1:FSMC_D12
+  PD_8,  //D73 - 1:FSMC_D13 / USART3_TX
+  PD_9,  //D74 - 1:FSMC_D14 / USART3_RX
+  PD_10, //D75 - 1:FSMC_D15
+  PD_11, //D76 - 1:FSMC_A16
+  PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
+  PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
+  PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
+  PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
+  PD_0,  //D81 - 1:FSMC_D2
+  PD_1,  //D82 - 1:FSMC_D3
+  PD_3,  //D83 - 1:FSMC_CLK
+  PD_4,  //D84 - 1:FSMC_NOE
+  PD_5,  //D85 - 1:USART2_TX
+  PD_6,  //D86 - 1:USART2_RX
+  PD_7,  //D87
+  PE_0,  //D88
+  PE_1,  //D89
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  PF_0,  //D90 - 1:FSMC_A0 / I2C2_SDA
+  PF_1,  //D91 - 1:FSMC_A1 / I2C2_SCL
+  PF_2,  //D92 - 1:FSMC_A2
+  PF_11, //D93
+  PF_12, //D94 - 1:FSMC_A6
+  PF_13, //D95 - 1:FSMC_A7
+  PF_14, //D96 - 1:FSMC_A8
+  PF_15, //D97 - 1:FSMC_A9
+  PG_0,  //D98 - 1:FSMC_A10
+  PG_1,  //D99 - 1:FSMC_A11
+  PG_2,  //D100 - 1:FSMC_A12
+  PG_3,  //D101 - 1:FSMC_A13
+  PG_4,  //D102 - 1:FSMC_A14
+  PG_5,  //D103 - 1:FSMC_A15
+  PG_6,  //D104
+  PG_7,  //D105
+  PG_8,  //D106
+  PG_9,  //D107 - 1:USART6_RX
+  PG_10, //D108 - 1:FSMC_NE3
+  PG_11, //D109
+  PG_12, //D110 - 1:FSMC_NE4
+  PG_13, //D111 - 1:FSMC_A24
+  PG_14, //D112 - 1:FSMC_A25 / USART6_TX
+  PG_15, //D113
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  PI_8,  //D114
+  PI_9,  //D115
+  PI_10, //D116
+  PI_11, //D117
+  PH_2,  //D118
+  PH_3,  //D119
+  PH_4,  //D120 - 1:I2C2_SCL
+  PH_5,  //D121 - 1:I2C2_SDA
+  PH_6,  //D122 - 1:TIM12_CH1
+  PH_7,  //D123 - 1:I2C3_SCL
+  PH_8,  //D124 - 1:I2C3_SDA
+  PH_9,  //D125 - 1:TIM12_CH2
+  PH_10, //D126 - 1:TIM5_CH1
+  PH_11, //D127 - 1:TIM5_CH2
+  PH_12, //D128 - 1:TIM5_CH3
+  PH_13, //D129
+  PH_14, //D130
+  PH_15, //D131
+  PI_0,  //D132 - 1:TIM5_CH4 / SPI2_NSS
+  PI_1,  //D133 - 1:SPI2_SCK
+  PI_2,  //D134 - 1:TIM8_CH4 /SPI2_MISO
+  PI_3,  //D135 - 1:SPI2_MOS
+  PI_4,  //D136
+  PI_5,  //D137 - 1:TIM8_CH1
+  PI_6,  //D138 - 1:TIM8_CH2
+  PI_7,  //D139 - 1:TIM8_CH3
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+// ------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config() {
+
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /**Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 336;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Configure the Systick interrupt time
+  */
+  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
+
+  /**Configure the Systick
+  */
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+  /* SysTick_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+#ifdef __cplusplus
+}
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_BTT002/variant.h

@@ -0,0 +1,292 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/*----------------------------------------------------------------------------
+ *        Pins
+ *----------------------------------------------------------------------------*/
+
+#ifdef STM32F405RX
+  #define STM32F4X_PIN_NUM  64  //64 pins mcu, 51 gpio
+  #define STM32F4X_GPIO_NUM 51
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5VX)
+  #define STM32F4X_PIN_NUM  100  //100 pins mcu, 82 gpio
+  #define STM32F4X_GPIO_NUM 82
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5ZX)
+  #define STM32F4X_PIN_NUM  144  //144 pins mcu, 114 gpio
+  #define STM32F4X_GPIO_NUM 114
+  #define STM32F4X_ADC_NUM  24
+#elif defined(STM32F407IX)
+  #define STM32F4X_PIN_NUM  176  //176 pins mcu, 140 gpio
+  #define STM32F4X_GPIO_NUM 140
+  #define STM32F4X_ADC_NUM  24
+#else
+  #error "no match MCU defined"
+#endif
+
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  #define PC13  0
+  #define PC14  1 //OSC32_IN
+  #define PC15  2 //OSC32_OUT
+  #define PH0   3 //OSC_IN
+  #define PH1   4 //OSC_OUT
+  #define PB2   5 //BOOT1
+  #define PB10  6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  #define PB11  7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
+  #define PB12  8 //1:SPI2_NSS / OTG_HS_ID
+  #define PB13  9 //1:SPI2_SCK  2:OTG_HS_VBUS
+  #define PB14  10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  #define PB15  11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  #define PC6   12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  #define PC7   13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  #define PC8   14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  #define PC9   15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  #define PA8   16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  #define PA9   17 //1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  #define PA10  18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  #define PA11  19 //1:TIM1_CH4 / OTG_FS_DM
+  #define PA12  20 //1:OTG_FS_DP
+  #define PA13  21 //0:JTMS-SWDIO
+  #define PA14  22 //0:JTCK-SWCLK
+  #define PA15  23 //0:JTDI  1:SPI3_NSS / SPI1_NSS
+  #define PC10  24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  #define PC11  25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  #define PC12  26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
+  #define PD2   27 //1:UART5_RX / SDIO_CMD
+  #define PB3   28 //0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  #define PB4   29 //0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  #define PB5   30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  #define PB6   31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  #define PB7   32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  #define PB8   33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  #define PB9   34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  #define PA0   35 //1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  #define PA1   36 //1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  #define PA2   37 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  #define PA3   38 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  #define PA4   39 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  #define PA5   40 //NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  #define PA6   41 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  #define PA7   42 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  #define PB0   43 //1:TIM3_CH3  2:ADC12_IN8
+  #define PB1   44 //1:TIM3_CH4  2:ADC12_IN9
+  #define PC0   45 //1:  2:ADC123_IN10
+  #define PC1   46 //1:  2:ADC123_IN11
+  #define PC2   47 //1:SPI2_MISO  2:ADC123_IN12
+  #define PC3   48 //1:SPI2_MOSI  2:ADC123_IN13
+  #define PC4   49 //1:  2:ADC12_IN14
+  #define PC5   50 //1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    #define PF3   51 //1:FSMC_A3  2:ADC3_IN9
+    #define PF4   52 //1:FSMC_A4  2:ADC3_IN14
+    #define PF5   53 //1:FSMC_A5  2:ADC3_IN15
+    #define PF6   54 //1:TIM10_CH1  2:ADC3_IN4
+    #define PF7   55 //1:TIM11_CH1  2:ADC3_IN5
+    #define PF8   56 //1:TIM13_CH1  2:ADC3_IN6
+    #define PF9   57 //1;TIM14_CH1  2:ADC3_IN7
+    #define PF10  58 //2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  #define PE2   (35+STM32F4X_ADC_NUM) //1:FSMC_A23
+  #define PE3   (36+STM32F4X_ADC_NUM) //1:FSMC_A19
+  #define PE4   (37+STM32F4X_ADC_NUM) //1:FSMC_A20
+  #define PE5   (38+STM32F4X_ADC_NUM) //1:FSMC_A21
+  #define PE6   (39+STM32F4X_ADC_NUM) //1:FSMC_A22
+  #define PE7   (40+STM32F4X_ADC_NUM) //1:FSMC_D4
+  #define PE8   (41+STM32F4X_ADC_NUM) //1:FSMC_D5
+  #define PE9   (42+STM32F4X_ADC_NUM) //1:FSMC_D6 / TIM1_CH1
+  #define PE10  (43+STM32F4X_ADC_NUM) //1:FSMC_D7
+  #define PE11  (44+STM32F4X_ADC_NUM) //1:FSMC_D8 / TIM1_CH2
+  #define PE12  (45+STM32F4X_ADC_NUM) //1:FSMC_D9
+  #define PE13  (46+STM32F4X_ADC_NUM) //1:FSMC_D10 / TIM1_CH3
+  #define PE14  (47+STM32F4X_ADC_NUM) //1:FSMC_D11 / TIM1_CH4
+  #define PE15  (48+STM32F4X_ADC_NUM) //1:FSMC_D12
+  #define PD8   (49+STM32F4X_ADC_NUM) //1:FSMC_D13 / USART3_TX
+  #define PD9   (50+STM32F4X_ADC_NUM) //1:FSMC_D14 / USART3_RX
+  #define PD10  (51+STM32F4X_ADC_NUM) //1:FSMC_D15
+  #define PD11  (52+STM32F4X_ADC_NUM) //1:FSMC_A16
+  #define PD12  (53+STM32F4X_ADC_NUM) //1:FSMC_A17 / TIM4_CH1
+  #define PD13  (54+STM32F4X_ADC_NUM) //1:FSMC_A18 / TIM4_CH2
+  #define PD14  (55+STM32F4X_ADC_NUM) //1:FSMC_D0 / TIM4_CH3
+  #define PD15  (56+STM32F4X_ADC_NUM) //1:FSMC_D1 / TIM4_CH4
+  #define PD0   (57+STM32F4X_ADC_NUM) //1:FSMC_D2
+  #define PD1   (58+STM32F4X_ADC_NUM) //1:FSMC_D3
+  #define PD3   (59+STM32F4X_ADC_NUM) //1:FSMC_CLK
+  #define PD4   (60+STM32F4X_ADC_NUM) //1:FSMC_NOE
+  #define PD5   (61+STM32F4X_ADC_NUM) //1:USART2_TX
+  #define PD6   (62+STM32F4X_ADC_NUM) //1:USART2_RX
+  #define PD7   (63+STM32F4X_ADC_NUM)
+  #define PE0   (64+STM32F4X_ADC_NUM)
+  #define PE1   (65+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  #define PF0   (66+STM32F4X_ADC_NUM) //1:FSMC_A0 / I2C2_SDA
+  #define PF1   (67+STM32F4X_ADC_NUM) //1:FSMC_A1 / I2C2_SCL
+  #define PF2   (68+STM32F4X_ADC_NUM) //1:FSMC_A2
+  #define PF11  (69+STM32F4X_ADC_NUM)
+  #define PF12  (70+STM32F4X_ADC_NUM) //1:FSMC_A6
+  #define PF13  (71+STM32F4X_ADC_NUM) //1:FSMC_A7
+  #define PF14  (72+STM32F4X_ADC_NUM) //1:FSMC_A8
+  #define PF15  (73+STM32F4X_ADC_NUM) //1:FSMC_A9
+  #define PG0   (74+STM32F4X_ADC_NUM) //1:FSMC_A10
+  #define PG1   (75+STM32F4X_ADC_NUM) //1:FSMC_A11
+  #define PG2   (76+STM32F4X_ADC_NUM) //1:FSMC_A12
+  #define PG3   (77+STM32F4X_ADC_NUM) //1:FSMC_A13
+  #define PG4   (78+STM32F4X_ADC_NUM) //1:FSMC_A14
+  #define PG5   (79+STM32F4X_ADC_NUM) //1:FSMC_A15
+  #define PG6   (80+STM32F4X_ADC_NUM)
+  #define PG7   (81+STM32F4X_ADC_NUM)
+  #define PG8   (82+STM32F4X_ADC_NUM)
+  #define PG9   (83+STM32F4X_ADC_NUM) //1:USART6_RX
+  #define PG10  (84+STM32F4X_ADC_NUM) //1:FSMC_NE3
+  #define PG11  (85+STM32F4X_ADC_NUM)
+  #define PG12  (86+STM32F4X_ADC_NUM) //1:FSMC_NE4
+  #define PG13  (87+STM32F4X_ADC_NUM) //1:FSMC_A24
+  #define PG14  (88+STM32F4X_ADC_NUM) //1:FSMC_A25 / USART6_TX
+  #define PG15  (89+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  #define PI8   (90+STM32F4X_ADC_NUM)
+  #define PI9   (91+STM32F4X_ADC_NUM)
+  #define PI10  (92+STM32F4X_ADC_NUM)
+  #define PI11  (93+STM32F4X_ADC_NUM)
+  #define PH2   (94+STM32F4X_ADC_NUM)
+  #define PH3   (95+STM32F4X_ADC_NUM)
+  #define PH4   (96+STM32F4X_ADC_NUM) //1:I2C2_SCL
+  #define PH5   (97+STM32F4X_ADC_NUM) //1:I2C2_SDA
+  #define PH6   (98+STM32F4X_ADC_NUM) //1:TIM12_CH1
+  #define PH7   (99+STM32F4X_ADC_NUM) //1:I2C3_SCL
+  #define PH8   (100+STM32F4X_ADC_NUM) //1:I2C3_SDA
+  #define PH9   (101+STM32F4X_ADC_NUM) //1:TIM12_CH2
+  #define PH10  (102+STM32F4X_ADC_NUM) //1:TIM5_CH1
+  #define PH11  (103+STM32F4X_ADC_NUM) //1:TIM5_CH2
+  #define PH12  (104+STM32F4X_ADC_NUM) //1:TIM5_CH3
+  #define PH13  (105+STM32F4X_ADC_NUM)
+  #define PH14  (106+STM32F4X_ADC_NUM)
+  #define PH15  (107+STM32F4X_ADC_NUM)
+  #define PI0   (108+STM32F4X_ADC_NUM) //1:TIM5_CH4 / SPI2_NSS
+  #define PI1   (109+STM32F4X_ADC_NUM) //1:SPI2_SCK
+  #define PI2   (110+STM32F4X_ADC_NUM) //1:TIM8_CH4 /SPI2_MISO
+  #define PI3   (111+STM32F4X_ADC_NUM) //1:SPI2_MOS
+  #define PI4   (112+STM32F4X_ADC_NUM)
+  #define PI5   (113+STM32F4X_ADC_NUM) //1:TIM8_CH1
+  #define PI6   (114+STM32F4X_ADC_NUM) //1:TIM8_CH2
+  #define PI7   (115+STM32F4X_ADC_NUM) //1:TIM8_CH3
+#endif
+
+// This must be a literal
+#define NUM_DIGITAL_PINS        (STM32F4X_GPIO_NUM)
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
+#define NUM_ANALOG_INPUTS       (STM32F4X_ADC_NUM)
+#define NUM_ANALOG_FIRST        35
+
+// Below ADC, DAC and PWM definitions already done in the core
+// Could be redefined here if needed
+// ADC resolution is 12bits
+//#define ADC_RESOLUTION          12
+//#define DACC_RESOLUTION         12
+
+// PWM resolution
+/*
+ * BEWARE:
+ * Changing this value from the default (1000) will affect the PWM output value of analogWrite (to a PWM pin)
+ * Since the pin is toggled on capture, if you change the frequency of the timer you have to adapt the compare value (analogWrite thinks you did)
+ */
+//#define PWM_FREQUENCY           20000
+//The bottom values are the default and don't need to be redefined
+//#define PWM_RESOLUTION          8
+//#define PWM_MAX_DUTY_CYCLE      255
+
+// Below SPI and I2C definitions already done in the core
+// Could be redefined here if differs from the default one
+// SPI Definitions
+#define PIN_SPI_MOSI            PB15
+#define PIN_SPI_MISO            PB14
+#define PIN_SPI_SCK             PB13
+#define PIN_SPI_SS              PB12
+
+// I2C Definitions
+#define PIN_WIRE_SDA            PB7
+#define PIN_WIRE_SCL            PB6
+
+// Timer Definitions
+//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
+#define TIMER_TONE              TIM7
+#define TIMER_SERVO             TIM5
+#define TIMER_SERIAL            TIM2
+
+// UART Definitions
+// Define here Serial instance number to map on Serial generic name
+#define SERIAL_UART_INSTANCE    1 //ex: 2 for Serial2 (USART2)
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
+//#define DEBUG_UART              ((USART_TypeDef *) U(S)ARTX) // ex: USART3
+// DEBUG_UART baudrate, default: 9600 if not defined
+//#define DEBUG_UART_BAUDRATE     x
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
+//#define DEBUG_PINNAME_TX        PX_n // PinName used for TX
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#define PIN_SERIAL_RX           PA10
+#define PIN_SERIAL_TX           PA9
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+// These serial port names are intended to allow libraries and architecture-neutral
+// sketches to automatically default to the correct port name for a particular type
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
+//
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+//
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+//
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+//
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+//
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+//                            pins are NOT connected to anything by default.
+#define SERIAL_PORT_MONITOR     Serial
+#define SERIAL_PORT_HARDWARE    Serial1
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/PeripheralPins.c

@@ -0,0 +1,373 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
+ */
+#include <Arduino.h>
+#include <PeripheralPins.h>
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used by default.
+ *       If you change them, you should know what you're doing first.
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+const PinMap PinMap_ADC[] = {
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0      E0_DIR
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1      BLTOUCH_2
+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2      BLTOUCH_4
+  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3      E1_EN
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4      TF_SS
+  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5      TF_SCLK
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6      TF_MISO
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7      LED
+  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8      HEATER2
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9      HEATER0
+  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10    Z_EN
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11    EXP_14
+  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12    Z_DIR
+  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13    E0_EN
+  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14    EXP_8
+  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15    EXP_7
+
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio, 24 ADC
+    {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9    TH_0
+    {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14  TH_1
+    {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15  TH_2
+    {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4    TH_3
+    {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5    EXP_13
+    {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6    EXP_3
+    {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7    EXP_6
+    {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8    EXP_5
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+const PinMap PinMap_DAC[] = {
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+  {NC,    NP,    0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SDA[] = {
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  #if STM32F4X_PIN_NUM >= 144   // 144 pins mcu, 114 gpio
+    #if STM32F4X_PIN_NUM >= 176
+      {PH_5,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+    #else
+      {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    #endif
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  #if STM32F4X_PIN_NUM >= 144   // 144 pins mcu, 114 gpio
+    #if STM32F4X_PIN_NUM >= 176
+      //{PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_4,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_7,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+    #else
+      {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    #endif
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+const PinMap PinMap_PWM[] = {
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4    HEATER0
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3    HEATER1
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3    HEATER2
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1    BED
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3    FAN0
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1    FAN1
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2    FAN2
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4    EXTENSION1-4
+  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2    BL-TOUCH-SERVO
+
+  // These pins have been defined for something else on the board but they MIGHT be
+  // used by the user as PWM pins if they aren't used for their primary purpose.
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1    ESP8266 connector. Available if 8266 isn't used
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2    ESP8266 connector. Available if 8266 isn't used
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2    I2C connector, SDA pin. Available if I2C isn't used.
+                                                                                       // TIM5_CH1    is used by the Servo Library
+  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3    BL-TOUCH port. Available if Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN
+
+  /**
+   * Unused by specifications on SKR-Pro.
+   * Uncomment the corresponding line if you want to have HardwarePWM on some pins.
+   * WARNING: check timers' usage first to avoid conflicts.
+   * If you don't know what you're doing leave things as they are or you WILL break something (including hardware)
+   * If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you.
+   */
+  //{PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2  BLTOUCH is a "servo"
+  {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3  BLTOUCH is a "servo"
+  //{PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  //{PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  //{PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  //{PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  //{PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  //{PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  //{PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  //{PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  //{PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  //{PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  //{PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  //{PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  //{PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+  //{PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+  //{PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  //{PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  //{PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+    //{PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+    //{PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+    //{PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  #endif
+  #if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+    {PH_10,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+    {PH_6,  TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+    //{PH_11,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+    {PI_5,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+    {PI_6,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_TX[] = {
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  //{PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RX[] = {
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  //{PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  //{PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RTS[] = {
+  //{PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    //{PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_CTS[] = {
+  //{PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    //{PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_MOSI[] = {
+  //{PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#error "CAN bus isn't available on this board. Driver should be disabled."
+#endif
+
+//*** ETHERNET ***
+#ifdef HAL_ETH_MODULE_ENABLED
+#error "Ethernet port isn't available on this board. Driver should be disabled."
+#endif
+
+//*** No QUADSPI ***
+
+//*** USB ***
+#ifdef HAL_PCD_MODULE_ENABLED
+const PinMap PinMap_USB_OTG_FS[] = {
+  //{PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF   used by LCD
+  //{PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)},     // USB_OTG_FS_VBUS  available on wifi port, if empty
+  //{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID    available on UART1_RX if not used
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_USB_OTG_HS[] = { /*
+  #ifdef USE_USB_HS_IN_FS
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+    {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
+    {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
+  #else
+    #error "USB in HS mode isn't supported by the board"
+    {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
+    {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
+    {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
+    {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
+    {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
+    {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
+    {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
+    {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
+  #endif // USE_USB_HS_IN_FS
+  */
+  {NC,    NP,    0}
+};
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/PinNamesVar.h

@@ -0,0 +1,50 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+  USB_OTG_FS_SOF      = PA_8,
+  USB_OTG_FS_VBUS     = PA_9,
+  USB_OTG_FS_ID       = PA_10,
+  USB_OTG_FS_DM       = PA_11,
+  USB_OTG_FS_DP       = PA_12,
+  USB_OTG_HS_ULPI_D0  = PA_3,
+  USB_OTG_HS_SOF      = PA_4,
+  USB_OTG_HS_ULPI_CK  = PA_5,
+  USB_OTG_HS_ULPI_D1  = PB_0,
+  USB_OTG_HS_ULPI_D2  = PB_1,
+  USB_OTG_HS_ULPI_D7  = PB_5,
+  USB_OTG_HS_ULPI_D3  = PB_10,
+  USB_OTG_HS_ULPI_D4  = PB_11,
+  USB_OTG_HS_ID       = PB_12,
+  USB_OTG_HS_ULPI_D5  = PB_12,
+  USB_OTG_HS_ULPI_D6  = PB_13,
+  USB_OTG_HS_VBUS     = PB_13,
+  USB_OTG_HS_DM       = PB_14,
+  USB_OTG_HS_DP       = PB_15,
+  USB_OTG_HS_ULPI_STP = PC_0,
+  USB_OTG_HS_ULPI_DIR = PC_2,
+  USB_OTG_HS_ULPI_NXT = PC_3,
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/hal_conf_extra.h

@@ -0,0 +1,52 @@
+#pragma once
+
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED Real Time Clock...do we use it?
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED // by default
+//#define HAL_PCD_MODULE_ENABLED  // Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
+
+#undef HAL_SD_MODULE_ENABLED
+#undef HAL_DAC_MODULE_ENABLED
+#undef HAL_FLASH_MODULE_ENABLED
+#undef HAL_CAN_MODULE_ENABLED
+#undef HAL_CAN_LEGACY_MODULE_ENABLED
+#undef HAL_CEC_MODULE_ENABLED
+#undef HAL_CRYP_MODULE_ENABLED
+#undef HAL_DCMI_MODULE_ENABLED
+#undef HAL_DMA2D_MODULE_ENABLED
+#undef HAL_ETH_MODULE_ENABLED
+#undef HAL_NAND_MODULE_ENABLED
+#undef HAL_NOR_MODULE_ENABLED
+#undef HAL_PCCARD_MODULE_ENABLED
+#undef HAL_SRAM_MODULE_ENABLED
+#undef HAL_SDRAM_MODULE_ENABLED
+#undef HAL_HASH_MODULE_ENABLED
+#undef HAL_EXTI_MODULE_ENABLED
+#undef HAL_SMBUS_MODULE_ENABLED
+#undef HAL_I2S_MODULE_ENABLED
+#undef HAL_IWDG_MODULE_ENABLED
+#undef HAL_LTDC_MODULE_ENABLED
+#undef HAL_DSI_MODULE_ENABLED
+#undef HAL_QSPI_MODULE_ENABLED
+#undef HAL_RNG_MODULE_ENABLED
+#undef HAL_SAI_MODULE_ENABLED
+#undef HAL_IRDA_MODULE_ENABLED
+#undef HAL_SMARTCARD_MODULE_ENABLED
+#undef HAL_WWDG_MODULE_ENABLED
+#undef HAL_HCD_MODULE_ENABLED
+#undef HAL_FMPI2C_MODULE_ENABLED
+#undef HAL_SPDIFRX_MODULE_ENABLED
+#undef HAL_DFSDM_MODULE_ENABLED
+#undef HAL_LPTIM_MODULE_ENABLED
+#undef HAL_MMC_MODULE_ENABLED

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/ldscript.ld

@@ -0,0 +1,204 @@
+/*
+*****************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F407ZGTx Device with
+**                1024KByte FLASH, 128KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of Ac6 nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 1024K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+   *
+   * IMPORTANT NOTE!
+   * If initialized variables will be placed in this section,
+   * the startup code needs to be modified to copy the init-values.
+   */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(4);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(4);
+  } >RAM
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/variant.cpp

@@ -0,0 +1,260 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Pin number
+// This array allows to wrap Arduino pin number(Dx or x)
+// to STM32 PinName (PX_n)
+const PinName digitalPin[] = {
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  PC_13, //D0
+  PC_14, //D1  - OSC32_IN
+  PC_15, //D2  - OSC32_OUT
+  PH_0,  //D3  - OSC_IN
+  PH_1,  //D4  - OSC_OUT
+  PB_2,  //D5  - BOOT1
+  PB_10, //D6  - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  PB_11, //D7  - 1:I2C2_SDA / USART3_RX / TIM2_CH4
+  PB_12, //D8  - 1:SPI2_NSS / OTG_HS_ID
+  PB_13, //D9  - 1:SPI2_SCK  2:OTG_HS_VBUS
+  PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  PC_6,  //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  PC_7,  //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  PC_8,  //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  PC_9,  //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  PA_8,  //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  PA_9,  //D17 - 1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
+  PA_12, //D20 - 1:OTG_FS_DP
+  PA_13, //D21 - 0:JTMS-SWDIO
+  PA_14, //D22 - 0:JTCK-SWCLK
+  PA_15, //D23 - 0:JTDI  1:SPI3_NSS / SPI1_NSS
+  PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
+  PD_2,  //D27 - 1:UART5_RX / SDIO_CMD
+  PB_3,  //D28 - 0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  PB_4,  //D29 - 0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  PB_5,  //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  PB_6,  //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  PB_7,  //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  PB_8,  //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  PB_9,  //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  PA_0,  //D35/A0 - 1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  PA_1,  //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  PA_2,  //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  PA_3,  //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  PA_4,  //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  PA_5,  //D40/A5 - NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  PA_6,  //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  PA_7,  //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  PB_0,  //D43/A8 - 1:TIM3_CH3  2:ADC12_IN8
+  PB_1,  //D44/A9 - 1:TIM3_CH4  2:ADC12_IN9
+  PC_0,  //D45/A10 - 1:  2:ADC123_IN10
+  PC_1,  //D46/A11 - 1:  2:ADC123_IN11
+  PC_2,  //D47/A12 - 1:SPI2_MISO  2:ADC123_IN12
+  PC_3,  //D48/A13 - 1:SPI2_MOSI  2:ADC123_IN13
+  PC_4,  //D49/A14 - 1:  2:ADC12_IN14
+  PC_5,  //D50/A15 - 1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    PF_3,  //D51/A16 - 1:FSMC_A3  2:ADC3_IN9
+    PF_4,  //D52/A17 - 1:FSMC_A4  2:ADC3_IN14
+    PF_5,  //D53/A18 - 1:FSMC_A5  2:ADC3_IN15
+    PF_6,  //D54/A19 - 1:TIM10_CH1  2:ADC3_IN4
+    PF_7,  //D55/A20 - 1:TIM11_CH1  2:ADC3_IN5
+    PF_8,  //D56/A21 - 1:TIM13_CH1  2:ADC3_IN6
+    PF_9,  //D57/A22 - 1;TIM14_CH1  2:ADC3_IN7
+    PF_10, //D58/A23 - 2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  PE_2,  //D59 - 1:FSMC_A23
+  PE_3,  //D60 - 1:FSMC_A19
+  PE_4,  //D61 - 1:FSMC_A20
+  PE_5,  //D62 - 1:FSMC_A21
+  PE_6,  //D63 - 1:FSMC_A22
+  PE_7,  //D64 - 1:FSMC_D4
+  PE_8,  //D65 - 1:FSMC_D5
+  PE_9,  //D66 - 1:FSMC_D6 / TIM1_CH1
+  PE_10, //D67 - 1:FSMC_D7
+  PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
+  PE_12, //D69 - 1:FSMC_D9
+  PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
+  PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
+  PE_15, //D72 - 1:FSMC_D12
+  PD_8,  //D73 - 1:FSMC_D13 / USART3_TX
+  PD_9,  //D74 - 1:FSMC_D14 / USART3_RX
+  PD_10, //D75 - 1:FSMC_D15
+  PD_11, //D76 - 1:FSMC_A16
+  PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
+  PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
+  PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
+  PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
+  PD_0,  //D81 - 1:FSMC_D2
+  PD_1,  //D82 - 1:FSMC_D3
+  PD_3,  //D83 - 1:FSMC_CLK
+  PD_4,  //D84 - 1:FSMC_NOE
+  PD_5,  //D85 - 1:USART2_TX
+  PD_6,  //D86 - 1:USART2_RX
+  PD_7,  //D87
+  PE_0,  //D88
+  PE_1,  //D89
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  PF_0,  //D90 - 1:FSMC_A0 / I2C2_SDA
+  PF_1,  //D91 - 1:FSMC_A1 / I2C2_SCL
+  PF_2,  //D92 - 1:FSMC_A2
+  PF_11, //D93
+  PF_12, //D94 - 1:FSMC_A6
+  PF_13, //D95 - 1:FSMC_A7
+  PF_14, //D96 - 1:FSMC_A8
+  PF_15, //D97 - 1:FSMC_A9
+  PG_0,  //D98 - 1:FSMC_A10
+  PG_1,  //D99 - 1:FSMC_A11
+  PG_2,  //D100 - 1:FSMC_A12
+  PG_3,  //D101 - 1:FSMC_A13
+  PG_4,  //D102 - 1:FSMC_A14
+  PG_5,  //D103 - 1:FSMC_A15
+  PG_6,  //D104
+  PG_7,  //D105
+  PG_8,  //D106
+  PG_9,  //D107 - 1:USART6_RX
+  PG_10, //D108 - 1:FSMC_NE3
+  PG_11, //D109
+  PG_12, //D110 - 1:FSMC_NE4
+  PG_13, //D111 - 1:FSMC_A24
+  PG_14, //D112 - 1:FSMC_A25 / USART6_TX
+  PG_15, //D113
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  PI_8,  //D114
+  PI_9,  //D115
+  PI_10, //D116
+  PI_11, //D117
+  PH_2,  //D118
+  PH_3,  //D119
+  PH_4,  //D120 - 1:I2C2_SCL
+  PH_5,  //D121 - 1:I2C2_SDA
+  PH_6,  //D122 - 1:TIM12_CH1
+  PH_7,  //D123 - 1:I2C3_SCL
+  PH_8,  //D124 - 1:I2C3_SDA
+  PH_9,  //D125 - 1:TIM12_CH2
+  PH_10, //D126 - 1:TIM5_CH1
+  PH_11, //D127 - 1:TIM5_CH2
+  PH_12, //D128 - 1:TIM5_CH3
+  PH_13, //D129
+  PH_14, //D130
+  PH_15, //D131
+  PI_0,  //D132 - 1:TIM5_CH4 / SPI2_NSS
+  PI_1,  //D133 - 1:SPI2_SCK
+  PI_2,  //D134 - 1:TIM8_CH4 /SPI2_MISO
+  PI_3,  //D135 - 1:SPI2_MOS
+  PI_4,  //D136
+  PI_5,  //D137 - 1:TIM8_CH1
+  PI_6,  //D138 - 1:TIM8_CH2
+  PI_7,  //D139 - 1:TIM8_CH3
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+// ------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config() {
+
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /**Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 336;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Configure the Systick interrupt time
+  */
+  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
+
+  /**Configure the Systick
+  */
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+  /* SysTick_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+#ifdef __cplusplus
+}
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_GTR_V1/variant.h

@@ -0,0 +1,322 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/*----------------------------------------------------------------------------
+ *        Pins
+ *----------------------------------------------------------------------------*/
+
+#ifdef STM32F405RX
+  #define STM32F4X_PIN_NUM  64  //64 pins mcu, 51 gpio
+  #define STM32F4X_GPIO_NUM 51
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5VX)
+  #define STM32F4X_PIN_NUM  100  //100 pins mcu, 82 gpio
+  #define STM32F4X_GPIO_NUM 82
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5ZX)
+  #define STM32F4X_PIN_NUM  144  //144 pins mcu, 114 gpio
+  #define STM32F4X_GPIO_NUM 114
+  #define STM32F4X_ADC_NUM  24
+#elif defined(STM32F407IX)
+  #define STM32F4X_PIN_NUM  176  //176 pins mcu, 140 gpio
+  #define STM32F4X_GPIO_NUM 140
+  #define STM32F4X_ADC_NUM  24
+#else
+  #error "no match MCU defined"
+#endif
+
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  #define PC13  0
+  #define PC14  1 //OSC32_IN
+  #define PC15  2 //OSC32_OUT
+  #define PH0   3 //OSC_IN
+  #define PH1   4 //OSC_OUT
+  #define PB2   5 //BOOT1
+  #define PB10  6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  #define PB11  7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
+  #define PB12  8 //1:SPI2_NSS / OTG_HS_ID
+  #define PB13  9 //1:SPI2_SCK  2:OTG_HS_VBUS
+  #define PB14  10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  #define PB15  11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  #define PC6   12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  #define PC7   13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  #define PC8   14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  #define PC9   15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  #define PA8   16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  #define PA9   17 //1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  #define PA10  18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  #define PA11  19 //1:TIM1_CH4 / OTG_FS_DM
+  #define PA12  20 //1:OTG_FS_DP
+  #define PA13  21 //0:JTMS-SWDIO
+  #define PA14  22 //0:JTCK-SWCLK
+  #define PA15  23 //0:JTDI  1:SPI3_NSS / SPI1_NSS
+  #define PC10  24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  #define PC11  25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  #define PC12  26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
+  #define PD2   27 //1:UART5_RX / SDIO_CMD
+  #define PB3   28 //0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  #define PB4   29 //0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  #define PB5   30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  #define PB6   31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  #define PB7   32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  #define PB8   33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  #define PB9   34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  #define PA0   35 //1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  #define PA1   36 //1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  #define PA2   37 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  #define PA3   38 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  #define PA4   39 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  #define PA5   40 //NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  #define PA6   41 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  #define PA7   42 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  #define PB0   43 //1:TIM3_CH3  2:ADC12_IN8
+  #define PB1   44 //1:TIM3_CH4  2:ADC12_IN9
+  #define PC0   45 //1:  2:ADC123_IN10
+  #define PC1   46 //1:  2:ADC123_IN11
+  #define PC2   47 //1:SPI2_MISO  2:ADC123_IN12
+  #define PC3   48 //1:SPI2_MOSI  2:ADC123_IN13
+  #define PC4   49 //1:  2:ADC12_IN14
+  #define PC5   50 //1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    #define PF3   51 //1:FSMC_A3  2:ADC3_IN9
+    #define PF4   52 //1:FSMC_A4  2:ADC3_IN14
+    #define PF5   53 //1:FSMC_A5  2:ADC3_IN15
+    #define PF6   54 //1:TIM10_CH1  2:ADC3_IN4
+    #define PF7   55 //1:TIM11_CH1  2:ADC3_IN5
+    #define PF8   56 //1:TIM13_CH1  2:ADC3_IN6
+    #define PF9   57 //1;TIM14_CH1  2:ADC3_IN7
+    #define PF10  58 //2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  #define PE2   (35+STM32F4X_ADC_NUM) //1:FSMC_A23
+  #define PE3   (36+STM32F4X_ADC_NUM) //1:FSMC_A19
+  #define PE4   (37+STM32F4X_ADC_NUM) //1:FSMC_A20
+  #define PE5   (38+STM32F4X_ADC_NUM) //1:FSMC_A21
+  #define PE6   (39+STM32F4X_ADC_NUM) //1:FSMC_A22
+  #define PE7   (40+STM32F4X_ADC_NUM) //1:FSMC_D4
+  #define PE8   (41+STM32F4X_ADC_NUM) //1:FSMC_D5
+  #define PE9   (42+STM32F4X_ADC_NUM) //1:FSMC_D6 / TIM1_CH1
+  #define PE10  (43+STM32F4X_ADC_NUM) //1:FSMC_D7
+  #define PE11  (44+STM32F4X_ADC_NUM) //1:FSMC_D8 / TIM1_CH2
+  #define PE12  (45+STM32F4X_ADC_NUM) //1:FSMC_D9
+  #define PE13  (46+STM32F4X_ADC_NUM) //1:FSMC_D10 / TIM1_CH3
+  #define PE14  (47+STM32F4X_ADC_NUM) //1:FSMC_D11 / TIM1_CH4
+  #define PE15  (48+STM32F4X_ADC_NUM) //1:FSMC_D12
+  #define PD8   (49+STM32F4X_ADC_NUM) //1:FSMC_D13 / USART3_TX
+  #define PD9   (50+STM32F4X_ADC_NUM) //1:FSMC_D14 / USART3_RX
+  #define PD10  (51+STM32F4X_ADC_NUM) //1:FSMC_D15
+  #define PD11  (52+STM32F4X_ADC_NUM) //1:FSMC_A16
+  #define PD12  (53+STM32F4X_ADC_NUM) //1:FSMC_A17 / TIM4_CH1
+  #define PD13  (54+STM32F4X_ADC_NUM) //1:FSMC_A18 / TIM4_CH2
+  #define PD14  (55+STM32F4X_ADC_NUM) //1:FSMC_D0 / TIM4_CH3
+  #define PD15  (56+STM32F4X_ADC_NUM) //1:FSMC_D1 / TIM4_CH4
+  #define PD0   (57+STM32F4X_ADC_NUM) //1:FSMC_D2
+  #define PD1   (58+STM32F4X_ADC_NUM) //1:FSMC_D3
+  #define PD3   (59+STM32F4X_ADC_NUM) //1:FSMC_CLK
+  #define PD4   (60+STM32F4X_ADC_NUM) //1:FSMC_NOE
+  #define PD5   (61+STM32F4X_ADC_NUM) //1:USART2_TX
+  #define PD6   (62+STM32F4X_ADC_NUM) //1:USART2_RX
+  #define PD7   (63+STM32F4X_ADC_NUM)
+  #define PE0   (64+STM32F4X_ADC_NUM)
+  #define PE1   (65+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  #define PF0   (66+STM32F4X_ADC_NUM) //1:FSMC_A0 / I2C2_SDA
+  #define PF1   (67+STM32F4X_ADC_NUM) //1:FSMC_A1 / I2C2_SCL
+  #define PF2   (68+STM32F4X_ADC_NUM) //1:FSMC_A2
+  #define PF11  (69+STM32F4X_ADC_NUM)
+  #define PF12  (70+STM32F4X_ADC_NUM) //1:FSMC_A6
+  #define PF13  (71+STM32F4X_ADC_NUM) //1:FSMC_A7
+  #define PF14  (72+STM32F4X_ADC_NUM) //1:FSMC_A8
+  #define PF15  (73+STM32F4X_ADC_NUM) //1:FSMC_A9
+  #define PG0   (74+STM32F4X_ADC_NUM) //1:FSMC_A10
+  #define PG1   (75+STM32F4X_ADC_NUM) //1:FSMC_A11
+  #define PG2   (76+STM32F4X_ADC_NUM) //1:FSMC_A12
+  #define PG3   (77+STM32F4X_ADC_NUM) //1:FSMC_A13
+  #define PG4   (78+STM32F4X_ADC_NUM) //1:FSMC_A14
+  #define PG5   (79+STM32F4X_ADC_NUM) //1:FSMC_A15
+  #define PG6   (80+STM32F4X_ADC_NUM)
+  #define PG7   (81+STM32F4X_ADC_NUM)
+  #define PG8   (82+STM32F4X_ADC_NUM)
+  #define PG9   (83+STM32F4X_ADC_NUM) //1:USART6_RX
+  #define PG10  (84+STM32F4X_ADC_NUM) //1:FSMC_NE3
+  #define PG11  (85+STM32F4X_ADC_NUM)
+  #define PG12  (86+STM32F4X_ADC_NUM) //1:FSMC_NE4
+  #define PG13  (87+STM32F4X_ADC_NUM) //1:FSMC_A24
+  #define PG14  (88+STM32F4X_ADC_NUM) //1:FSMC_A25 / USART6_TX
+  #define PG15  (89+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  #define PI8   (90+STM32F4X_ADC_NUM)
+  #define PI9   (91+STM32F4X_ADC_NUM)
+  #define PI10  (92+STM32F4X_ADC_NUM)
+  #define PI11  (93+STM32F4X_ADC_NUM)
+  #define PH2   (94+STM32F4X_ADC_NUM)
+  #define PH3   (95+STM32F4X_ADC_NUM)
+  #define PH4   (96+STM32F4X_ADC_NUM) //1:I2C2_SCL
+  #define PH5   (97+STM32F4X_ADC_NUM) //1:I2C2_SDA
+  #define PH6   (98+STM32F4X_ADC_NUM) //1:TIM12_CH1
+  #define PH7   (99+STM32F4X_ADC_NUM) //1:I2C3_SCL
+  #define PH8   (100+STM32F4X_ADC_NUM) //1:I2C3_SDA
+  #define PH9   (101+STM32F4X_ADC_NUM) //1:TIM12_CH2
+  #define PH10  (102+STM32F4X_ADC_NUM) //1:TIM5_CH1
+  #define PH11  (103+STM32F4X_ADC_NUM) //1:TIM5_CH2
+  #define PH12  (104+STM32F4X_ADC_NUM) //1:TIM5_CH3
+  #define PH13  (105+STM32F4X_ADC_NUM)
+  #define PH14  (106+STM32F4X_ADC_NUM)
+  #define PH15  (107+STM32F4X_ADC_NUM)
+  #define PI0   (108+STM32F4X_ADC_NUM) //1:TIM5_CH4 / SPI2_NSS
+  #define PI1   (109+STM32F4X_ADC_NUM) //1:SPI2_SCK
+  #define PI2   (110+STM32F4X_ADC_NUM) //1:TIM8_CH4 /SPI2_MISO
+  #define PI3   (111+STM32F4X_ADC_NUM) //1:SPI2_MOS
+  #define PI4   (112+STM32F4X_ADC_NUM)
+  #define PI5   (113+STM32F4X_ADC_NUM) //1:TIM8_CH1
+  #define PI6   (114+STM32F4X_ADC_NUM) //1:TIM8_CH2
+  #define PI7   (115+STM32F4X_ADC_NUM) //1:TIM8_CH3
+#endif
+
+
+// This must be a literal
+#define NUM_DIGITAL_PINS        (STM32F4X_GPIO_NUM)
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
+#define NUM_ANALOG_INPUTS       (STM32F4X_ADC_NUM)
+#define NUM_ANALOG_FIRST        35
+
+// Below ADC, DAC and PWM definitions already done in the core
+// Could be redefined here if needed
+// ADC resolution is 12bits
+//#define ADC_RESOLUTION          12
+//#define DACC_RESOLUTION         12
+
+// PWM resolution
+/*
+ * BEWARE:
+ * Changing this value from the default (1000) will affect the PWM output value of analogWrite (to a PWM pin)
+ * Since the pin is toggled on capture, if you change the frequency of the timer you have to adapt the compare value (analogWrite thinks you did)
+ */
+//#define PWM_FREQUENCY           20000
+//The bottom values are the default and don't need to be redefined
+//#define PWM_RESOLUTION          8
+//#define PWM_MAX_DUTY_CYCLE      255
+
+// On-board LED pin number
+#define LED_BUILTIN             PA7
+#define LED_GREEN               LED_BUILTIN
+
+// Below SPI and I2C definitions already done in the core
+// Could be redefined here if differs from the default one
+// SPI Definitions
+#define PIN_SPI_MOSI            PB15
+#define PIN_SPI_MISO            PB14
+#define PIN_SPI_SCK             PB13
+#define PIN_SPI_SS              PB12
+
+// I2C Definitions
+#if STM32F4X_PIN_NUM >= 176
+  #define PIN_WIRE_SDA          PH5
+  #define PIN_WIRE_SCL          PH4
+#else
+  #define PIN_WIRE_SDA          PB7
+  #define PIN_WIRE_SCL          PB6
+#endif
+
+// Timer Definitions
+//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
+#define TIMER_TONE              TIM2
+#define TIMER_SERVO             TIM5 // Only 1 Servo PIN on SKR-PRO, so use the same timer as defined in PeripheralPins
+#define TIMER_SERIAL            TIM7
+
+// UART Definitions
+//#define ENABLE_HWSERIAL1        done automatically by the #define SERIAL_UART_INSTANCE below
+#define ENABLE_HWSERIAL3
+#define ENABLE_HWSERIAL6
+
+// Define here Serial instance number to map on Serial generic name (if not already used by SerialUSB)
+#define SERIAL_UART_INSTANCE    1 //1 for Serial = Serial1 (USART1)
+
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
+//#define DEBUG_UART              ((USART_TypeDef *) U(S)ARTX) // ex: USART3
+// DEBUG_UART baudrate, default: 9600 if not defined
+//#define DEBUG_UART_BAUDRATE     x
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
+//#define DEBUG_PINNAME_TX        PX_n // PinName used for TX
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#define PIN_SERIAL_RX           PA10
+#define PIN_SERIAL_TX           PA9
+
+// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
+// Used when user instanciate a hardware Serial using its peripheral name.
+// Example: HardwareSerial mySerial(USART3);
+// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
+#define PIN_SERIAL1_RX          PA10
+#define PIN_SERIAL1_TX          PA9
+#define PIN_SERIAL3_RX          PD9
+#define PIN_SERIAL3_TX          PD8
+#define PIN_SERIAL6_RX          PC7
+#define PIN_SERIAL6_TX          PC6
+//#define PIN_SERIALLP1_RX        x // For LPUART1 RX
+//#define PIN_SERIALLP1_TX        x // For LPUART1 TX
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+// These serial port names are intended to allow libraries and architecture-neutral
+// sketches to automatically default to the correct port name for a particular type
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
+//
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+//
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+//
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+//
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+//
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+//                            pins are NOT connected to anything by default.
+#define SERIAL_PORT_MONITOR         Serial
+#define SERIAL_PORT_HARDWARE        Serial1
+#define SERIAL_PORT_HARDWARE_OPEN   Serial3
+#define SERIAL_PORT_HARDWARE_OPEN1  Serial6
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PeripheralPins.c

@@ -0,0 +1,372 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
+ */
+#include <Arduino.h>
+#include <PeripheralPins.h>
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used by default.
+ *       If you change them, you should know what you're doing first.
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+const PinMap PinMap_ADC[] = {
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0      E0_DIR
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1      BLTOUCH_2
+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2      BLTOUCH_4
+  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3      E1_EN
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4      TF_SS
+  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5      TF_SCLK
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6      TF_MISO
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7      LED
+  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8      HEATER2
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9      HEATER0
+  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10    Z_EN
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11    EXP_14
+  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12    Z_DIR
+  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13    E0_EN
+  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14    EXP_8
+  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15    EXP_7
+
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio, 24 ADC
+    {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9    TH_0
+    {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14  TH_1
+    {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15  TH_2
+    {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4    TH_3
+    {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5    EXP_13
+    {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6    EXP_3
+    {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7    EXP_6
+    {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8    EXP_5
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+const PinMap PinMap_DAC[] = {
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+  {NC,    NP,    0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SDA[] = {
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  #if STM32F4X_PIN_NUM >= 144   // 144 pins mcu, 114 gpio
+    #if STM32F4X_PIN_NUM >= 176
+      {PH_5,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+    #else
+      {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    #endif
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  #if STM32F4X_PIN_NUM >= 144   // 144 pins mcu, 114 gpio
+    #if STM32F4X_PIN_NUM >= 176
+      //{PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_4,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+      {PH_7,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+    #else
+      {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    #endif
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+const PinMap PinMap_PWM[] = {
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4    HEATER0
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3    HEATER1
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3    HEATER2
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1    BED
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3    FAN0
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1    FAN1
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2    FAN2
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4    EXTENSION1-4
+  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2    BL-TOUCH-SERVO
+
+  // These pins have been defined for something else on the board but they MIGHT be
+  // used by the user as PWM pins if they aren't used for their primary purpose.
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1    ESP8266 connector. Available if 8266 isn't used
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2    ESP8266 connector. Available if 8266 isn't used
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2    I2C connector, SDA pin. Available if I2C isn't used.
+                                                                                       // TIM5_CH1    is used by the Servo Library
+  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3    BL-TOUCH port. Available if Z_MIN_PROBE_USES_Z_MIN_ENDSTOP_PIN
+
+  /**
+   * Unused by specifications on SKR-Pro.
+   * Uncomment the corresponding line if you want to have HardwarePWM on some pins.
+   * WARNING: check timers' usage first to avoid conflicts.
+   * If you don't know what you're doing leave things as they are or you WILL break something (including hardware)
+   * If you alter this section DO NOT report bugs to Marlin team since they are most likely caused by you. Thank you.
+   */
+  //{PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  //{PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2   BLTOUCH is a "servo"
+  //{PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3   BLTOUCH is a "servo"
+  //{PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  //{PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  //{PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  //{PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  //{PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  //{PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //{PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  //{PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  //{PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  //{PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //{PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  //{PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //{PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  //{PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  //{PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  //{PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  //{PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //{PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+  //{PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+  //{PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //{PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  //{PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  //{PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  //{PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  //{PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  //{PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  //{PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  //{PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  //{PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  //{PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  //{PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  //{PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+    //{PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+    //{PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+    //{PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  #endif
+  #if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+    {PH_10,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+    {PH_6,  TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+    //{PH_11,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+    {PI_5,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+    {PI_6,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_TX[] = {
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  //{PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RX[] = {
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  //{PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  //{PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  //{PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_RTS[] = {
+  //{PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    //{PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_UART_CTS[] = {
+  //{PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  //{PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  //{PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  //{PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  #if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+    //{PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+    //{PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  #endif
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_MOSI[] = {
+  {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#error "CAN bus isn't available on this board. Driver should be disabled."
+#endif
+
+//*** ETHERNET ***
+#ifdef HAL_ETH_MODULE_ENABLED
+#error "Ethernet port isn't available on this board. Driver should be disabled."
+#endif
+
+//*** No QUADSPI ***
+
+//*** USB ***
+#ifdef HAL_PCD_MODULE_ENABLED
+const PinMap PinMap_USB_OTG_FS[] = {
+  //{PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF   used by LCD
+  //{PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)},     // USB_OTG_FS_VBUS  available on wifi port, if empty
+  //{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID    available on UART1_RX if not used
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,    0}
+};
+
+const PinMap PinMap_USB_OTG_HS[] = { /*
+  #ifdef USE_USB_HS_IN_FS
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+    {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
+    {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
+  #else
+    #error "USB in HS mode isn't supported by the board"
+    {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
+    {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
+    {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
+    {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
+    {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
+    {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
+    {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
+    {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
+    {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
+    {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
+  #endif // USE_USB_HS_IN_FS
+  */
+  {NC,    NP,    0}
+};
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/PinNamesVar.h

@@ -0,0 +1,50 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+  USB_OTG_FS_SOF      = PA_8,
+  USB_OTG_FS_VBUS     = PA_9,
+  USB_OTG_FS_ID       = PA_10,
+  USB_OTG_FS_DM       = PA_11,
+  USB_OTG_FS_DP       = PA_12,
+  USB_OTG_HS_ULPI_D0  = PA_3,
+  USB_OTG_HS_SOF      = PA_4,
+  USB_OTG_HS_ULPI_CK  = PA_5,
+  USB_OTG_HS_ULPI_D1  = PB_0,
+  USB_OTG_HS_ULPI_D2  = PB_1,
+  USB_OTG_HS_ULPI_D7  = PB_5,
+  USB_OTG_HS_ULPI_D3  = PB_10,
+  USB_OTG_HS_ULPI_D4  = PB_11,
+  USB_OTG_HS_ID       = PB_12,
+  USB_OTG_HS_ULPI_D5  = PB_12,
+  USB_OTG_HS_ULPI_D6  = PB_13,
+  USB_OTG_HS_VBUS     = PB_13,
+  USB_OTG_HS_DM       = PB_14,
+  USB_OTG_HS_DP       = PB_15,
+  USB_OTG_HS_ULPI_STP = PC_0,
+  USB_OTG_HS_ULPI_DIR = PC_2,
+  USB_OTG_HS_ULPI_NXT = PC_3,
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/hal_conf_extra.h

@@ -0,0 +1,52 @@
+#pragma once
+
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED Real Time Clock...do we use it?
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED // by default
+//#define HAL_PCD_MODULE_ENABLED  // Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
+
+#undef HAL_SD_MODULE_ENABLED
+#undef HAL_DAC_MODULE_ENABLED
+#undef HAL_FLASH_MODULE_ENABLED
+#undef HAL_CAN_MODULE_ENABLED
+#undef HAL_CAN_LEGACY_MODULE_ENABLED
+#undef HAL_CEC_MODULE_ENABLED
+#undef HAL_CRYP_MODULE_ENABLED
+#undef HAL_DCMI_MODULE_ENABLED
+#undef HAL_DMA2D_MODULE_ENABLED
+#undef HAL_ETH_MODULE_ENABLED
+#undef HAL_NAND_MODULE_ENABLED
+#undef HAL_NOR_MODULE_ENABLED
+#undef HAL_PCCARD_MODULE_ENABLED
+#undef HAL_SRAM_MODULE_ENABLED
+#undef HAL_SDRAM_MODULE_ENABLED
+#undef HAL_HASH_MODULE_ENABLED
+#undef HAL_EXTI_MODULE_ENABLED
+#undef HAL_SMBUS_MODULE_ENABLED
+#undef HAL_I2S_MODULE_ENABLED
+#undef HAL_IWDG_MODULE_ENABLED
+#undef HAL_LTDC_MODULE_ENABLED
+#undef HAL_DSI_MODULE_ENABLED
+#undef HAL_QSPI_MODULE_ENABLED
+#undef HAL_RNG_MODULE_ENABLED
+#undef HAL_SAI_MODULE_ENABLED
+#undef HAL_IRDA_MODULE_ENABLED
+#undef HAL_SMARTCARD_MODULE_ENABLED
+#undef HAL_WWDG_MODULE_ENABLED
+#undef HAL_HCD_MODULE_ENABLED
+#undef HAL_FMPI2C_MODULE_ENABLED
+#undef HAL_SPDIFRX_MODULE_ENABLED
+#undef HAL_DFSDM_MODULE_ENABLED
+#undef HAL_LPTIM_MODULE_ENABLED
+#undef HAL_MMC_MODULE_ENABLED

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/ldscript.ld

@@ -0,0 +1,204 @@
+/*
+*****************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F407ZGTx Device with
+**                1024KByte FLASH, 128KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of Ac6 nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 1024K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+   *
+   * IMPORTANT NOTE!
+   * If initialized variables will be placed in this section,
+   * the startup code needs to be modified to copy the init-values.
+   */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(4);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(4);
+  } >RAM
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/variant.cpp

@@ -0,0 +1,260 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Pin number
+// This array allows to wrap Arduino pin number(Dx or x)
+// to STM32 PinName (PX_n)
+const PinName digitalPin[] = {
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  PC_13, //D0
+  PC_14, //D1  - OSC32_IN
+  PC_15, //D2  - OSC32_OUT
+  PH_0,  //D3  - OSC_IN
+  PH_1,  //D4  - OSC_OUT
+  PB_2,  //D5  - BOOT1
+  PB_10, //D6  - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  PB_11, //D7  - 1:I2C2_SDA / USART3_RX / TIM2_CH4
+  PB_12, //D8  - 1:SPI2_NSS / OTG_HS_ID
+  PB_13, //D9  - 1:SPI2_SCK  2:OTG_HS_VBUS
+  PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  PC_6,  //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  PC_7,  //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  PC_8,  //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  PC_9,  //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  PA_8,  //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  PA_9,  //D17 - 1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
+  PA_12, //D20 - 1:OTG_FS_DP
+  PA_13, //D21 - 0:JTMS-SWDIO
+  PA_14, //D22 - 0:JTCK-SWCLK
+  PA_15, //D23 - 0:JTDI  1:SPI3_NSS / SPI1_NSS
+  PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
+  PD_2,  //D27 - 1:UART5_RX / SDIO_CMD
+  PB_3,  //D28 - 0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  PB_4,  //D29 - 0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  PB_5,  //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  PB_6,  //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  PB_7,  //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  PB_8,  //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  PB_9,  //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  PA_0,  //D35/A0 - 1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  PA_1,  //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  PA_2,  //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  PA_3,  //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  PA_4,  //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  PA_5,  //D40/A5 - NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  PA_6,  //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  PA_7,  //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  PB_0,  //D43/A8 - 1:TIM3_CH3  2:ADC12_IN8
+  PB_1,  //D44/A9 - 1:TIM3_CH4  2:ADC12_IN9
+  PC_0,  //D45/A10 - 1:  2:ADC123_IN10
+  PC_1,  //D46/A11 - 1:  2:ADC123_IN11
+  PC_2,  //D47/A12 - 1:SPI2_MISO  2:ADC123_IN12
+  PC_3,  //D48/A13 - 1:SPI2_MOSI  2:ADC123_IN13
+  PC_4,  //D49/A14 - 1:  2:ADC12_IN14
+  PC_5,  //D50/A15 - 1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    PF_3,  //D51/A16 - 1:FSMC_A3  2:ADC3_IN9
+    PF_4,  //D52/A17 - 1:FSMC_A4  2:ADC3_IN14
+    PF_5,  //D53/A18 - 1:FSMC_A5  2:ADC3_IN15
+    PF_6,  //D54/A19 - 1:TIM10_CH1  2:ADC3_IN4
+    PF_7,  //D55/A20 - 1:TIM11_CH1  2:ADC3_IN5
+    PF_8,  //D56/A21 - 1:TIM13_CH1  2:ADC3_IN6
+    PF_9,  //D57/A22 - 1;TIM14_CH1  2:ADC3_IN7
+    PF_10, //D58/A23 - 2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  PE_2,  //D59 - 1:FSMC_A23
+  PE_3,  //D60 - 1:FSMC_A19
+  PE_4,  //D61 - 1:FSMC_A20
+  PE_5,  //D62 - 1:FSMC_A21
+  PE_6,  //D63 - 1:FSMC_A22
+  PE_7,  //D64 - 1:FSMC_D4
+  PE_8,  //D65 - 1:FSMC_D5
+  PE_9,  //D66 - 1:FSMC_D6 / TIM1_CH1
+  PE_10, //D67 - 1:FSMC_D7
+  PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
+  PE_12, //D69 - 1:FSMC_D9
+  PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
+  PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
+  PE_15, //D72 - 1:FSMC_D12
+  PD_8,  //D73 - 1:FSMC_D13 / USART3_TX
+  PD_9,  //D74 - 1:FSMC_D14 / USART3_RX
+  PD_10, //D75 - 1:FSMC_D15
+  PD_11, //D76 - 1:FSMC_A16
+  PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
+  PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
+  PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
+  PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
+  PD_0,  //D81 - 1:FSMC_D2
+  PD_1,  //D82 - 1:FSMC_D3
+  PD_3,  //D83 - 1:FSMC_CLK
+  PD_4,  //D84 - 1:FSMC_NOE
+  PD_5,  //D85 - 1:USART2_TX
+  PD_6,  //D86 - 1:USART2_RX
+  PD_7,  //D87
+  PE_0,  //D88
+  PE_1,  //D89
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  PF_0,  //D90 - 1:FSMC_A0 / I2C2_SDA
+  PF_1,  //D91 - 1:FSMC_A1 / I2C2_SCL
+  PF_2,  //D92 - 1:FSMC_A2
+  PF_11, //D93
+  PF_12, //D94 - 1:FSMC_A6
+  PF_13, //D95 - 1:FSMC_A7
+  PF_14, //D96 - 1:FSMC_A8
+  PF_15, //D97 - 1:FSMC_A9
+  PG_0,  //D98 - 1:FSMC_A10
+  PG_1,  //D99 - 1:FSMC_A11
+  PG_2,  //D100 - 1:FSMC_A12
+  PG_3,  //D101 - 1:FSMC_A13
+  PG_4,  //D102 - 1:FSMC_A14
+  PG_5,  //D103 - 1:FSMC_A15
+  PG_6,  //D104
+  PG_7,  //D105
+  PG_8,  //D106
+  PG_9,  //D107 - 1:USART6_RX
+  PG_10, //D108 - 1:FSMC_NE3
+  PG_11, //D109
+  PG_12, //D110 - 1:FSMC_NE4
+  PG_13, //D111 - 1:FSMC_A24
+  PG_14, //D112 - 1:FSMC_A25 / USART6_TX
+  PG_15, //D113
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  PI_8,  //D114
+  PI_9,  //D115
+  PI_10, //D116
+  PI_11, //D117
+  PH_2,  //D118
+  PH_3,  //D119
+  PH_4,  //D120 - 1:I2C2_SCL
+  PH_5,  //D121 - 1:I2C2_SDA
+  PH_6,  //D122 - 1:TIM12_CH1
+  PH_7,  //D123 - 1:I2C3_SCL
+  PH_8,  //D124 - 1:I2C3_SDA
+  PH_9,  //D125 - 1:TIM12_CH2
+  PH_10, //D126 - 1:TIM5_CH1
+  PH_11, //D127 - 1:TIM5_CH2
+  PH_12, //D128 - 1:TIM5_CH3
+  PH_13, //D129
+  PH_14, //D130
+  PH_15, //D131
+  PI_0,  //D132 - 1:TIM5_CH4 / SPI2_NSS
+  PI_1,  //D133 - 1:SPI2_SCK
+  PI_2,  //D134 - 1:TIM8_CH4 /SPI2_MISO
+  PI_3,  //D135 - 1:SPI2_MOS
+  PI_4,  //D136
+  PI_5,  //D137 - 1:TIM8_CH1
+  PI_6,  //D138 - 1:TIM8_CH2
+  PI_7,  //D139 - 1:TIM8_CH3
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+// ------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config() {
+
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /**Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 336;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Configure the Systick interrupt time
+  */
+  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
+
+  /**Configure the Systick
+  */
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+  /* SysTick_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+#ifdef __cplusplus
+}
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/BIGTREE_SKR_PRO_1v1/variant.h

@@ -0,0 +1,322 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/*----------------------------------------------------------------------------
+ *        Pins
+ *----------------------------------------------------------------------------*/
+
+#ifdef STM32F405RX
+  #define STM32F4X_PIN_NUM  64  //64 pins mcu, 51 gpio
+  #define STM32F4X_GPIO_NUM 51
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5VX)
+  #define STM32F4X_PIN_NUM  100  //100 pins mcu, 82 gpio
+  #define STM32F4X_GPIO_NUM 82
+  #define STM32F4X_ADC_NUM  16
+#elif defined(STM32F407_5ZX)
+  #define STM32F4X_PIN_NUM  144  //144 pins mcu, 114 gpio
+  #define STM32F4X_GPIO_NUM 114
+  #define STM32F4X_ADC_NUM  24
+#elif defined(STM32F407IX)
+  #define STM32F4X_PIN_NUM  176  //176 pins mcu, 140 gpio
+  #define STM32F4X_GPIO_NUM 140
+  #define STM32F4X_ADC_NUM  24
+#else
+  #error "no match MCU defined"
+#endif
+
+#if STM32F4X_PIN_NUM >= 64  //64 pins mcu, 51 gpio
+  #define PC13  0
+  #define PC14  1 //OSC32_IN
+  #define PC15  2 //OSC32_OUT
+  #define PH0   3 //OSC_IN
+  #define PH1   4 //OSC_OUT
+  #define PB2   5 //BOOT1
+  #define PB10  6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+  #define PB11  7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
+  #define PB12  8 //1:SPI2_NSS / OTG_HS_ID
+  #define PB13  9 //1:SPI2_SCK  2:OTG_HS_VBUS
+  #define PB14  10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+  #define PB15  11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+  #define PC6   12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+  #define PC7   13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+  #define PC8   14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+  #define PC9   15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+  #define PA8   16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+  #define PA9   17 //1:USART1_TX / TIM1_CH2  2:OTG_FS_VBUS
+  #define PA10  18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+  #define PA11  19 //1:TIM1_CH4 / OTG_FS_DM
+  #define PA12  20 //1:OTG_FS_DP
+  #define PA13  21 //0:JTMS-SWDIO
+  #define PA14  22 //0:JTCK-SWCLK
+  #define PA15  23 //0:JTDI  1:SPI3_NSS / SPI1_NSS
+  #define PC10  24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+  #define PC11  25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+  #define PC12  26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
+  #define PD2   27 //1:UART5_RX / SDIO_CMD
+  #define PB3   28 //0:JTDO  1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+  #define PB4   29 //0:NJTRST  1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+  #define PB5   30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+  #define PB6   31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
+  #define PB7   32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
+  #define PB8   33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+  #define PB9   34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+  #define PA0   35 //1:UART4_TX / TIM5_CH1  2:ADC123_IN0
+  #define PA1   36 //1:UART4_RX / TIM5_CH2 / TIM2_CH2  2:ADC123_IN1
+  #define PA2   37 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3  2:ADC123_IN2
+  #define PA3   38 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4  2:ADC123_IN3
+  #define PA4   39 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK  2:ADC12_IN4 / DAC_OUT1
+  #define PA5   40 //NOT FT 1:SPI1_SCK  2:ADC12_IN5 / DAC_OUT2
+  #define PA6   41 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1  2:ADC12_IN6
+  #define PA7   42 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2  2:ADC12_IN7
+  #define PB0   43 //1:TIM3_CH3  2:ADC12_IN8
+  #define PB1   44 //1:TIM3_CH4  2:ADC12_IN9
+  #define PC0   45 //1:  2:ADC123_IN10
+  #define PC1   46 //1:  2:ADC123_IN11
+  #define PC2   47 //1:SPI2_MISO  2:ADC123_IN12
+  #define PC3   48 //1:SPI2_MOSI  2:ADC123_IN13
+  #define PC4   49 //1:  2:ADC12_IN14
+  #define PC5   50 //1:  2:ADC12_IN15
+  #if STM32F4X_PIN_NUM >= 144
+    #define PF3   51 //1:FSMC_A3  2:ADC3_IN9
+    #define PF4   52 //1:FSMC_A4  2:ADC3_IN14
+    #define PF5   53 //1:FSMC_A5  2:ADC3_IN15
+    #define PF6   54 //1:TIM10_CH1  2:ADC3_IN4
+    #define PF7   55 //1:TIM11_CH1  2:ADC3_IN5
+    #define PF8   56 //1:TIM13_CH1  2:ADC3_IN6
+    #define PF9   57 //1;TIM14_CH1  2:ADC3_IN7
+    #define PF10  58 //2:ADC3_IN8
+  #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100  //100 pins mcu, 82 gpio
+  #define PE2   (35+STM32F4X_ADC_NUM) //1:FSMC_A23
+  #define PE3   (36+STM32F4X_ADC_NUM) //1:FSMC_A19
+  #define PE4   (37+STM32F4X_ADC_NUM) //1:FSMC_A20
+  #define PE5   (38+STM32F4X_ADC_NUM) //1:FSMC_A21
+  #define PE6   (39+STM32F4X_ADC_NUM) //1:FSMC_A22
+  #define PE7   (40+STM32F4X_ADC_NUM) //1:FSMC_D4
+  #define PE8   (41+STM32F4X_ADC_NUM) //1:FSMC_D5
+  #define PE9   (42+STM32F4X_ADC_NUM) //1:FSMC_D6 / TIM1_CH1
+  #define PE10  (43+STM32F4X_ADC_NUM) //1:FSMC_D7
+  #define PE11  (44+STM32F4X_ADC_NUM) //1:FSMC_D8 / TIM1_CH2
+  #define PE12  (45+STM32F4X_ADC_NUM) //1:FSMC_D9
+  #define PE13  (46+STM32F4X_ADC_NUM) //1:FSMC_D10 / TIM1_CH3
+  #define PE14  (47+STM32F4X_ADC_NUM) //1:FSMC_D11 / TIM1_CH4
+  #define PE15  (48+STM32F4X_ADC_NUM) //1:FSMC_D12
+  #define PD8   (49+STM32F4X_ADC_NUM) //1:FSMC_D13 / USART3_TX
+  #define PD9   (50+STM32F4X_ADC_NUM) //1:FSMC_D14 / USART3_RX
+  #define PD10  (51+STM32F4X_ADC_NUM) //1:FSMC_D15
+  #define PD11  (52+STM32F4X_ADC_NUM) //1:FSMC_A16
+  #define PD12  (53+STM32F4X_ADC_NUM) //1:FSMC_A17 / TIM4_CH1
+  #define PD13  (54+STM32F4X_ADC_NUM) //1:FSMC_A18 / TIM4_CH2
+  #define PD14  (55+STM32F4X_ADC_NUM) //1:FSMC_D0 / TIM4_CH3
+  #define PD15  (56+STM32F4X_ADC_NUM) //1:FSMC_D1 / TIM4_CH4
+  #define PD0   (57+STM32F4X_ADC_NUM) //1:FSMC_D2
+  #define PD1   (58+STM32F4X_ADC_NUM) //1:FSMC_D3
+  #define PD3   (59+STM32F4X_ADC_NUM) //1:FSMC_CLK
+  #define PD4   (60+STM32F4X_ADC_NUM) //1:FSMC_NOE
+  #define PD5   (61+STM32F4X_ADC_NUM) //1:USART2_TX
+  #define PD6   (62+STM32F4X_ADC_NUM) //1:USART2_RX
+  #define PD7   (63+STM32F4X_ADC_NUM)
+  #define PE0   (64+STM32F4X_ADC_NUM)
+  #define PE1   (65+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 144  //144 pins mcu, 114 gpio
+  #define PF0   (66+STM32F4X_ADC_NUM) //1:FSMC_A0 / I2C2_SDA
+  #define PF1   (67+STM32F4X_ADC_NUM) //1:FSMC_A1 / I2C2_SCL
+  #define PF2   (68+STM32F4X_ADC_NUM) //1:FSMC_A2
+  #define PF11  (69+STM32F4X_ADC_NUM)
+  #define PF12  (70+STM32F4X_ADC_NUM) //1:FSMC_A6
+  #define PF13  (71+STM32F4X_ADC_NUM) //1:FSMC_A7
+  #define PF14  (72+STM32F4X_ADC_NUM) //1:FSMC_A8
+  #define PF15  (73+STM32F4X_ADC_NUM) //1:FSMC_A9
+  #define PG0   (74+STM32F4X_ADC_NUM) //1:FSMC_A10
+  #define PG1   (75+STM32F4X_ADC_NUM) //1:FSMC_A11
+  #define PG2   (76+STM32F4X_ADC_NUM) //1:FSMC_A12
+  #define PG3   (77+STM32F4X_ADC_NUM) //1:FSMC_A13
+  #define PG4   (78+STM32F4X_ADC_NUM) //1:FSMC_A14
+  #define PG5   (79+STM32F4X_ADC_NUM) //1:FSMC_A15
+  #define PG6   (80+STM32F4X_ADC_NUM)
+  #define PG7   (81+STM32F4X_ADC_NUM)
+  #define PG8   (82+STM32F4X_ADC_NUM)
+  #define PG9   (83+STM32F4X_ADC_NUM) //1:USART6_RX
+  #define PG10  (84+STM32F4X_ADC_NUM) //1:FSMC_NE3
+  #define PG11  (85+STM32F4X_ADC_NUM)
+  #define PG12  (86+STM32F4X_ADC_NUM) //1:FSMC_NE4
+  #define PG13  (87+STM32F4X_ADC_NUM) //1:FSMC_A24
+  #define PG14  (88+STM32F4X_ADC_NUM) //1:FSMC_A25 / USART6_TX
+  #define PG15  (89+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 176  //176 pins mcu, 140 gpio
+  #define PI8   (90+STM32F4X_ADC_NUM)
+  #define PI9   (91+STM32F4X_ADC_NUM)
+  #define PI10  (92+STM32F4X_ADC_NUM)
+  #define PI11  (93+STM32F4X_ADC_NUM)
+  #define PH2   (94+STM32F4X_ADC_NUM)
+  #define PH3   (95+STM32F4X_ADC_NUM)
+  #define PH4   (96+STM32F4X_ADC_NUM) //1:I2C2_SCL
+  #define PH5   (97+STM32F4X_ADC_NUM) //1:I2C2_SDA
+  #define PH6   (98+STM32F4X_ADC_NUM) //1:TIM12_CH1
+  #define PH7   (99+STM32F4X_ADC_NUM) //1:I2C3_SCL
+  #define PH8   (100+STM32F4X_ADC_NUM) //1:I2C3_SDA
+  #define PH9   (101+STM32F4X_ADC_NUM) //1:TIM12_CH2
+  #define PH10  (102+STM32F4X_ADC_NUM) //1:TIM5_CH1
+  #define PH11  (103+STM32F4X_ADC_NUM) //1:TIM5_CH2
+  #define PH12  (104+STM32F4X_ADC_NUM) //1:TIM5_CH3
+  #define PH13  (105+STM32F4X_ADC_NUM)
+  #define PH14  (106+STM32F4X_ADC_NUM)
+  #define PH15  (107+STM32F4X_ADC_NUM)
+  #define PI0   (108+STM32F4X_ADC_NUM) //1:TIM5_CH4 / SPI2_NSS
+  #define PI1   (109+STM32F4X_ADC_NUM) //1:SPI2_SCK
+  #define PI2   (110+STM32F4X_ADC_NUM) //1:TIM8_CH4 /SPI2_MISO
+  #define PI3   (111+STM32F4X_ADC_NUM) //1:SPI2_MOS
+  #define PI4   (112+STM32F4X_ADC_NUM)
+  #define PI5   (113+STM32F4X_ADC_NUM) //1:TIM8_CH1
+  #define PI6   (114+STM32F4X_ADC_NUM) //1:TIM8_CH2
+  #define PI7   (115+STM32F4X_ADC_NUM) //1:TIM8_CH3
+#endif
+
+
+// This must be a literal
+#define NUM_DIGITAL_PINS        (STM32F4X_GPIO_NUM)
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
+#define NUM_ANALOG_INPUTS       (STM32F4X_ADC_NUM)
+#define NUM_ANALOG_FIRST        35
+
+// Below ADC, DAC and PWM definitions already done in the core
+// Could be redefined here if needed
+// ADC resolution is 12bits
+//#define ADC_RESOLUTION          12
+//#define DACC_RESOLUTION         12
+
+// PWM resolution
+/*
+ * BEWARE:
+ * Changing this value from the default (1000) will affect the PWM output value of analogWrite (to a PWM pin)
+ * Since the pin is toggled on capture, if you change the frequency of the timer you have to adapt the compare value (analogWrite thinks you did)
+ */
+//#define PWM_FREQUENCY           20000
+//The bottom values are the default and don't need to be redefined
+//#define PWM_RESOLUTION          8
+//#define PWM_MAX_DUTY_CYCLE      255
+
+// On-board LED pin number
+#define LED_BUILTIN             PA7
+#define LED_GREEN               LED_BUILTIN
+
+// Below SPI and I2C definitions already done in the core
+// Could be redefined here if differs from the default one
+// SPI Definitions
+#define PIN_SPI_MOSI            PB15
+#define PIN_SPI_MISO            PB14
+#define PIN_SPI_SCK             PB13
+#define PIN_SPI_SS              PB12
+
+// I2C Definitions
+#if STM32F4X_PIN_NUM >= 176
+  #define PIN_WIRE_SDA          PH5
+  #define PIN_WIRE_SCL          PH4
+#else
+  #define PIN_WIRE_SDA          PB7
+  #define PIN_WIRE_SCL          PB6
+#endif
+
+// Timer Definitions
+//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
+#define TIMER_TONE              TIM2
+#define TIMER_SERVO             TIM5 // Only 1 Servo PIN on SKR-PRO, so use the same timer as defined in PeripheralPins
+#define TIMER_SERIAL            TIM7
+
+// UART Definitions
+//#define ENABLE_HWSERIAL1        done automatically by the #define SERIAL_UART_INSTANCE below
+#define ENABLE_HWSERIAL3
+#define ENABLE_HWSERIAL6
+
+// Define here Serial instance number to map on Serial generic name (if not already used by SerialUSB)
+#define SERIAL_UART_INSTANCE    1 //1 for Serial = Serial1 (USART1)
+
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
+//#define DEBUG_UART              ((USART_TypeDef *) U(S)ARTX) // ex: USART3
+// DEBUG_UART baudrate, default: 9600 if not defined
+//#define DEBUG_UART_BAUDRATE     x
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
+//#define DEBUG_PINNAME_TX        PX_n // PinName used for TX
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#define PIN_SERIAL_RX           PA10
+#define PIN_SERIAL_TX           PA9
+
+// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
+// Used when user instanciate a hardware Serial using its peripheral name.
+// Example: HardwareSerial mySerial(USART3);
+// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
+#define PIN_SERIAL1_RX          PA10
+#define PIN_SERIAL1_TX          PA9
+#define PIN_SERIAL3_RX          PD9
+#define PIN_SERIAL3_TX          PD8
+#define PIN_SERIAL6_RX          PC7
+#define PIN_SERIAL6_TX          PC6
+//#define PIN_SERIALLP1_RX        x // For LPUART1 RX
+//#define PIN_SERIALLP1_TX        x // For LPUART1 TX
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+// These serial port names are intended to allow libraries and architecture-neutral
+// sketches to automatically default to the correct port name for a particular type
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
+//
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+//
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+//
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+//
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+//
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+//                            pins are NOT connected to anything by default.
+#define SERIAL_PORT_MONITOR         Serial
+#define SERIAL_PORT_HARDWARE        Serial1
+#define SERIAL_PORT_HARDWARE_OPEN   Serial3
+#define SERIAL_PORT_HARDWARE_OPEN1  Serial6
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/board.cpp

@@ -0,0 +1,233 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file   wirish/boards/maple/board.cpp
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief  Maple board file.
+ */
+
+#include <board/board.h>         // For this board's header file
+
+/* Roger Clark. Added next to includes for changes to Serial */
+#include <libmaple/usart.h>
+#include <HardwareSerial.h>
+
+#include <wirish_types.h> // For stm32_pin_info and its contents
+                                 // (these go into PIN_MAP).
+
+#include "boards_private.h"      // For PMAP_ROW(), which makes
+                                 // PIN_MAP easier to read.
+
+// boardInit(): nothing special to do for Maple.
+//
+// When defining your own board.cpp, you can put extra code in this
+// function if you have anything you want done on reset, before main()
+// or setup() are called.
+//
+// If there's nothing special you need done, feel free to leave this
+// function out, as we do here.
+/*
+void boardInit(void) {
+}
+*/
+
+// Pin map: this lets the basic I/O functions (digitalWrite(),
+// analogRead(), pwmWrite()) translate from pin numbers to STM32
+// peripherals.
+//
+// PMAP_ROW() lets us specify a row (really a struct stm32_pin_info)
+// in the pin map. Its arguments are:
+//
+// - GPIO device for the pin (&gpioa, etc.)
+// - GPIO bit for the pin (0 through 15)
+// - Timer device, or NULL if none
+// - Timer channel (1 to 4, for PWM), or 0 if none
+// - ADC device, or NULL if none
+// - ADC channel, or ADCx if none
+
+extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
+  /*
+    gpio_dev *gpio_device;      GPIO device
+    timer_dev *timer_device;    Pin's timer device, if any.
+    const adc_dev *adc_device;  ADC device, if any.
+    uint8 gpio_bit;             Pin's GPIO port bit.
+    uint8 timer_channel;        Timer channel, or 0 if none.
+    uint8 adc_channel;          Pin ADC channel, or ADCx if none.
+  */
+
+  {&gpioa, &timer2, &adc1,  0, 1,    0}, /* PA0 */
+  {&gpioa, &timer2, &adc1,  1, 2,    1}, /* PA1 */
+  {&gpioa, &timer2, &adc1,  2, 3,    2}, /* PA2 */
+  {&gpioa, &timer2, &adc1,  3, 4,    3}, /* PA3 */
+  {&gpioa,   NULL, &adc1,  4, 0,    4}, /* PA4 */
+  {&gpioa,   NULL, &adc1,  5, 0,    5}, /* PA5 */
+  {&gpioa, &timer3, &adc1,  6, 1,    6}, /* PA6 */
+  {&gpioa, &timer3, &adc1,  7, 2,    7}, /* PA7 */
+  {&gpioa, &timer1, NULL,  8, 1, ADCx}, /* PA8 */
+  {&gpioa, &timer1, NULL,  9, 2, ADCx}, /* PA9 */
+  {&gpioa, &timer1, NULL, 10, 3, ADCx}, /* PA10 */
+  {&gpioa,   NULL, NULL, 11, 0, ADCx}, /* PA11 */
+  {&gpioa,   NULL, NULL, 12, 0, ADCx}, /* PA12 */
+  {&gpioa,   NULL, NULL, 13, 0, ADCx}, /* PA13 */
+  {&gpioa,   NULL, NULL, 14, 0, ADCx}, /* PA14 */
+  {&gpioa,   NULL, NULL, 15, 0, ADCx}, /* PA15 */
+
+  {&gpiob, &timer3, &adc1,  0, 3,    8}, /* PB0 */
+  {&gpiob, &timer3, &adc1,  1, 4,    9}, /* PB1 */
+  {&gpiob, &timer3, &adc1,  2, 4,    9}, /* PB2 */
+  {&gpiob,   NULL, NULL,  3, 0, ADCx}, /* PB3  */
+  {&gpiob,   NULL, NULL,  4, 0, ADCx}, /* PB4  */
+  {&gpiob,   NULL, NULL,  5, 0, ADCx}, /* PB5 */
+  {&gpiob, &timer4, NULL,  6, 1, ADCx}, /* PB6 */
+  {&gpiob, &timer4, NULL,  7, 2, ADCx}, /* PB7 */
+  {&gpiob, &timer4, NULL,  8, 3, ADCx}, /* PB8 */
+  {&gpiob, &timer4, NULL,  9, 4, ADCx}, /* PB9 */
+  {&gpiob,   NULL, NULL, 10, 0, ADCx}, /* PB10 */
+  {&gpiob,   NULL, NULL, 11, 0, ADCx}, /* PB11 */
+  {&gpiob,   NULL, NULL, 12, 0, ADCx}, /* PB12 */
+  {&gpiob,   NULL, NULL, 13, 0, ADCx}, /* PB13 */
+  {&gpiob,   NULL, NULL, 14, 0, ADCx}, /* PB14 */
+  {&gpiob,   NULL, NULL, 15, 0, ADCx}, /* PB15 */
+
+
+  {&gpioc,   NULL, &adc1,  0, 0,   10}, /* PC0 */
+  {&gpioc,   NULL, &adc1,  1, 0,   11}, /* PC1 */
+  {&gpioc,   NULL, &adc1,  2, 0,   12}, /* PC2 */
+  {&gpioc,   NULL, &adc1,  3, 0,   13}, /* PC3 */
+  {&gpioc,   NULL, &adc1,  4, 0,   14}, /* PC4 */
+  {&gpioc,   NULL, &adc1,  5, 0,   15}, /* PC5 */
+  {&gpioc, &timer8, NULL,  6, 1, ADCx}, /* PC6 */
+  {&gpioc, &timer8, NULL,  7, 2, ADCx}, /* PC7 */
+  {&gpioc, &timer8, NULL,  8, 3, ADCx}, /* PC8 */
+  {&gpioc, &timer8, NULL,  9, 4, ADCx}, /* PC9 */
+  {&gpioc,   NULL, NULL, 10, 0, ADCx}, /* PC10 UART4_TX/SDIO_D2 */
+  {&gpioc,   NULL, NULL, 11, 0, ADCx}, /* PC11 UART4_RX/SDIO_D3 */
+  {&gpioc,   NULL, NULL, 12, 0, ADCx}, /* PC12 UART5_TX/SDIO_CK */
+  {&gpioc,   NULL, NULL, 13, 0, ADCx}, /* PC13 TAMPER-RTC */
+  {&gpioc,   NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */
+  {&gpioc,   NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */
+
+	{&gpiod,   NULL, NULL,   0, 0, ADCx} , /* PD0 OSC_IN */
+	{&gpiod,   NULL, NULL,   1, 0, ADCx} , /* PD1  OSC_OUT */
+	{&gpiod,   NULL, NULL,   2, 0, ADCx} , /* PD2  TIM3_ETR/UART5_RX SDIO_CMD */
+
+	{&gpiod,   NULL, NULL,   3, 0, ADCx} , /* PD3  FSMC_CLK */
+	{&gpiod,   NULL, NULL,   4, 0, ADCx} , /* PD4  FSMC_NOE */
+	{&gpiod,   NULL, NULL,   5, 0, ADCx} , /* PD5  FSMC_NWE */
+	{&gpiod,   NULL, NULL,   6, 0, ADCx} , /* PD6  FSMC_NWAIT */
+	{&gpiod,   NULL, NULL,   7, 0, ADCx} , /* PD7  FSMC_NE1/FSMC_NCE2 */
+	{&gpiod,   NULL, NULL,   8, 0, ADCx} , /* PD8  FSMC_D13 */
+	{&gpiod,   NULL, NULL,   9, 0, ADCx} , /* PD9  FSMC_D14 */
+	{&gpiod,   NULL, NULL,  10, 0, ADCx} , /* PD10  FSMC_D15 */
+	{&gpiod,   NULL, NULL,  11, 0, ADCx} , /* PD11  FSMC_A16 */
+	{&gpiod,   NULL, NULL,  12, 0, ADCx} , /* PD12  FSMC_A17 */
+	{&gpiod,   NULL, NULL,  13, 0, ADCx} , /* PD13  FSMC_A18 */
+	{&gpiod,   NULL, NULL,  14, 0, ADCx} , /* PD14  FSMC_D0 */
+	{&gpiod,   NULL, NULL,  15, 0, ADCx} , /* PD15  FSMC_D1 */
+
+	{&gpioe,   NULL, NULL,   0, 0, ADCx} , /* PE0   */
+	{&gpioe,   NULL, NULL,   1, 0, ADCx} , /* PE1   */
+	{&gpioe,   NULL, NULL,   2, 0, ADCx} , /* PE2   */
+	{&gpioe,   NULL, NULL,   3, 0, ADCx} , /* PE3   */
+	{&gpioe,   NULL, NULL,   4, 0, ADCx} , /* PE4   */
+	{&gpioe,   NULL, NULL,   5, 0, ADCx} , /* PE5   */
+	{&gpioe,   NULL, NULL,   6, 0, ADCx} , /* PE6   */
+	{&gpioe,   NULL, NULL,   7, 0, ADCx} , /* PE7   */
+	{&gpioe,   NULL, NULL,   8, 0, ADCx} , /* PE8   */
+	{&gpioe,   NULL, NULL,   9, 0, ADCx} , /* PE9   */
+	{&gpioe,   NULL, NULL,  10, 0, ADCx} , /* PE10  */
+	{&gpioe,   NULL, NULL,  11, 0, ADCx} , /* PE11  */
+	{&gpioe,   NULL, NULL,  12, 0, ADCx} , /* PE12  */
+	{&gpioe,   NULL, NULL,  13, 0, ADCx} , /* PE13  */
+	{&gpioe,   NULL, NULL,  14, 0, ADCx} , /* PE14  */
+	{&gpioe,   NULL, NULL,  15, 0, ADCx} , /* PE15  */
+
+	{&gpiof,   NULL, NULL,   0, 0, ADCx} , /* PF0   */
+	{&gpiof,   NULL, NULL,   1, 0, ADCx} , /* PF1   */
+	{&gpiof,   NULL, NULL,   2, 0, ADCx} , /* PF2   */
+	{&gpiof,   NULL, NULL,   3, 0, ADCx} , /* PF3   */
+	{&gpiof,   NULL, NULL,   4, 0, ADCx} , /* PF4   */
+	{&gpiof,   NULL, NULL,   5, 0, ADCx} , /* PF5   */
+	{&gpiof,   NULL, NULL,   6, 0, ADCx} , /* PF6   */
+	{&gpiof,   NULL, NULL,   7, 0, ADCx} , /* PF7   */
+	{&gpiof,   NULL, NULL,   8, 0, ADCx} , /* PF8   */
+	{&gpiof,   NULL, NULL,   9, 0, ADCx} , /* PF9   */
+	{&gpiof,   NULL, NULL,  10, 0, ADCx} , /* PF10  */
+	{&gpiof,   NULL, NULL,  11, 0, ADCx} , /* PF11  */
+	{&gpiof,   NULL, NULL,  12, 0, ADCx} , /* PF12  */
+	{&gpiof,   NULL, NULL,  13, 0, ADCx} , /* PF13  */
+	{&gpiof,   NULL, NULL,  14, 0, ADCx} , /* PF14  */
+	{&gpiof,   NULL, NULL,  15, 0, ADCx} , /* PF15  */
+
+	{&gpiog,   NULL, NULL,   0, 0, ADCx} , /* PG0   */
+	{&gpiog,   NULL, NULL,   1, 0, ADCx} , /* PG1   */
+	{&gpiog,   NULL, NULL,   2, 0, ADCx} , /* PG2   */
+	{&gpiog,   NULL, NULL,   3, 0, ADCx} , /* PG3   */
+	{&gpiog,   NULL, NULL,   4, 0, ADCx} , /* PG4   */
+	{&gpiog,   NULL, NULL,   5, 0, ADCx} , /* PG5   */
+	{&gpiog,   NULL, NULL,   6, 0, ADCx} , /* PG6   */
+	{&gpiog,   NULL, NULL,   7, 0, ADCx} , /* PG7   */
+	{&gpiog,   NULL, NULL,   8, 0, ADCx} , /* PG8   */
+	{&gpiog,   NULL, NULL,   9, 0, ADCx} , /* PG9   */
+	{&gpiog,   NULL, NULL,  10, 0, ADCx} , /* PG10  */
+	{&gpiog,   NULL, NULL,  11, 0, ADCx} , /* PG11  */
+	{&gpiog,   NULL, NULL,  12, 0, ADCx} , /* PG12  */
+	{&gpiog,   NULL, NULL,  13, 0, ADCx} , /* PG13  */
+	{&gpiog,   NULL, NULL,  14, 0, ADCx} , /* PG14  */
+	{&gpiog,   NULL, NULL,  15, 0, ADCx}   /* PG15  */
+};
+
+/*  Basically everything that is defined as having a timer us PWM */
+extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = {
+  PA0,PA1,PA2,PA3,PA6,PA7,PA8,PA9,PA10,PB0,PB1,PB6,PB7,PB8,PB9,PC6,PC7,PC8,PC9
+};
+
+/*  Basically everything that is defined having ADC */
+extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = {
+  PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5
+};
+
+/* not sure what this us used for */
+extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
+  BOARD_JTMS_SWDIO_PIN,
+  BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN
+};
+
+
+#ifdef SERIAL_USB
+	DEFINE_HWSERIAL(Serial1, 1);
+	DEFINE_HWSERIAL(Serial2, 2);
+	DEFINE_HWSERIAL(Serial3, 3);
+	DEFINE_HWSERIAL_UART(Serial4, 4);
+	DEFINE_HWSERIAL_UART(Serial5, 5);
+#else
+	DEFINE_HWSERIAL(Serial, 1);
+	DEFINE_HWSERIAL(Serial1, 2);
+	DEFINE_HWSERIAL(Serial2, 3);
+	DEFINE_HWSERIAL_UART(Serial3, 4);
+	DEFINE_HWSERIAL_UART(Serial4, 5);
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/board/board.h

@@ -0,0 +1,240 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file   maple_RET6.h
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief  Private include file for Maple RET6 Edition in boards.h
+ *
+ * See maple.h for more information on these definitions.
+ */
+
+#ifndef _BOARDS_GENERIC_STM32F103Z_H_
+#define _BOARDS_GENERIC_STM32F103Z_H_
+
+/* A few of these values will seem strange given that it's a
+ * high-density board. */
+
+#define CYCLES_PER_MICROSECOND  72
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
+
+// USARTS
+#define BOARD_NR_USARTS         5
+#define BOARD_USART1_TX_PIN     PA9
+#define BOARD_USART1_RX_PIN     PA10
+
+#define BOARD_USART2_TX_PIN     PA2
+#define BOARD_USART2_RX_PIN     PA3
+
+#define BOARD_USART3_TX_PIN     PB10
+#define BOARD_USART3_RX_PIN     PB11
+
+#define BOARD_USART4_TX_PIN     PC10
+#define BOARD_USART4_RX_PIN     PC11
+
+#define BOARD_USART5_TX_PIN     PC12
+#define BOARD_USART5_RX_PIN     PD2
+
+/* Note:
+ *
+ * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
+ * leave the definitions so as not to clutter things up.  This is only
+ * OK since RET6 Ed. is specifically advertised as a beta board. */
+#define BOARD_NR_SPI            3
+#define BOARD_SPI1_NSS_PIN      PA4
+#define BOARD_SPI1_SCK_PIN      PA5
+#define BOARD_SPI1_MISO_PIN     PA6
+#define BOARD_SPI1_MOSI_PIN     PA7
+
+
+
+#define BOARD_SPI2_NSS_PIN      PB12
+#define BOARD_SPI2_SCK_PIN      PB13
+#define BOARD_SPI2_MISO_PIN     PB14
+#define BOARD_SPI2_MOSI_PIN     PB15
+
+
+#define BOARD_SPI3_NSS_PIN      PA15
+#define BOARD_SPI3_SCK_PIN      PB3
+#define BOARD_SPI3_MISO_PIN     PB4
+#define BOARD_SPI3_MOSI_PIN     PB5
+
+
+/* GPIO A to E = 5 * 16  - BOOT1 not used = 79*/
+#define BOARD_NR_GPIO_PINS      112
+/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which
+ * isn't broken out to a header and is thus unusable for PWM. */
+#define BOARD_NR_PWM_PINS       19
+#define BOARD_NR_ADC_PINS       16
+#define BOARD_NR_USED_PINS      7
+
+#define BOARD_JTMS_SWDIO_PIN    39
+#define BOARD_JTCK_SWCLK_PIN    40
+#define BOARD_JTDI_PIN          41
+#define BOARD_JTDO_PIN          42
+#define BOARD_NJTRST_PIN        43
+
+/* USB configuration.  BOARD_USB_DISC_DEV is the GPIO port containing
+ * the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */
+#define BOARD_USB_DISC_DEV      GPIOC
+#define BOARD_USB_DISC_BIT      12
+
+/*
+ * SDIO Pins
+ */
+#define BOARD_SDIO_D0 			PC8
+#define BOARD_SDIO_D1 			PC9
+#define BOARD_SDIO_D2 			PC10
+#define BOARD_SDIO_D3 			PC11
+#define BOARD_SDIO_CLK 			PC12
+#define BOARD_SDIO_CMD 			PD2
+
+/* Pin aliases: these give the GPIO port/bit for each pin as an
+ * enum. These are optional, but recommended. They make it easier to
+ * write code using low-level GPIO functionality. */
+enum {
+PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15,
+PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15,
+PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15,
+PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15,
+PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15,
+PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15,
+PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15
+};/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */
+/*
+#define PA0 0
+#define PA1 1
+#define PA2 2
+#define PA3 3
+#define PA4 4
+#define PA5 5
+#define PA6 6
+#define PA7 7
+#define PA8 8
+#define PA9 9
+#define PA10 10
+#define PA11 11
+#define PA12 12
+#define PA13 13
+#define PA14 14
+#define PA15 15
+#define PB0 16
+#define PB1 17
+#define PB2 18
+#define PB3 19
+#define PB4 20
+#define PB5 21
+#define PB6 22
+#define PB7 23
+#define PB8 24
+#define PB9 25
+#define PB10 26
+#define PB11 27
+#define PB12 28
+#define PB13 29
+#define PB14 30
+#define PB15 31
+#define PC0 32
+#define PC1 33
+#define PC2 34
+#define PC3 35
+#define PC4 36
+#define PC5 37
+#define PC6 38
+#define PC7 39
+#define PC8 40
+#define PC9 41
+#define PC10 42
+#define PC11 43
+#define PC12 44
+#define PC13 45
+#define PC14 46
+#define PC15 47
+#define PD0 48
+#define PD1 49
+#define PD2 50
+#define PD3 51
+#define PD4 52
+#define PD5 53
+#define PD6 54
+#define PD7 55
+#define PD8 56
+#define PD9 57
+#define PD10 58
+#define PD11 59
+#define PD12 60
+#define PD13 61
+#define PD14 62
+#define PD15 63
+#define PE0 64
+#define PE1 65
+#define PE2 66
+#define PE3 67
+#define PE4 68
+#define PE5 69
+#define PE6 70
+#define PE7 71
+#define PE8 72
+#define PE9 73
+#define PE10 74
+#define PE11 75
+#define PE12 76
+#define PE13 77
+#define PE14 78
+#define PE15 79
+#define PF0 80
+#define PF1 81
+#define PF2 82
+#define PF3 83
+#define PF4 84
+#define PF5 85
+#define PF6 86
+#define PF7 87
+#define PF8 88
+#define PF9 89
+#define PF10 90
+#define PF11 91
+#define PF12 92
+#define PF13 93
+#define PF14 94
+#define PF15 95
+#define PG0 96
+#define PG1 97
+#define PG2 98
+#define PG3 99
+#define PG4 100
+#define PG5 101
+#define PG6 102
+#define PG7 103
+#define PG8 104
+#define PG9 105
+#define PG10 106
+#define PG11 107
+#define PG12 108
+#define PG13 109
+#define PG14 110
+#define PG15 111 */
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/common.inc

@@ -0,0 +1,220 @@
+/*
+ * Linker script for libmaple.
+ *
+ * Original author "lanchon" from ST forums, with modifications by LeafLabs.
+ */
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+/*
+ * Configure other libraries we want in the link.
+ *
+ * libgcc, libc, and libm are common across supported toolchains.
+ * However, some toolchains require additional archives which aren't
+ * present everywhere (e.g. ARM's gcc-arm-embedded releases).
+ *
+ * To hack around this, we let the build system specify additional
+ * archives by putting the right extra_libs.inc (in a directory under
+ * toolchains/) in our search path.
+ */
+GROUP(libgcc.a libc.a libm.a)
+INCLUDE extra_libs.inc
+
+/*
+ * These force the linker to search for vector table symbols.
+ *
+ * These symbols vary by STM32 family (and also within families).
+ * It's up to the build system to configure the link's search path
+ * properly for the target MCU.
+ */
+INCLUDE vector_symbols.inc
+
+/* STM32 vector table. */
+EXTERN(__stm32_vector_table)
+
+/* C runtime initialization function. */
+EXTERN(start_c)
+
+/* main entry point */
+EXTERN(main)
+
+/* Initial stack pointer value. */
+EXTERN(__msp_init)
+PROVIDE(__msp_init = ORIGIN(ram) + LENGTH(ram));
+
+/* Reset vector and chip reset entry point */
+EXTERN(__start__)
+ENTRY(__start__)
+PROVIDE(__exc_reset = __start__);
+
+/* Heap boundaries, for libmaple */
+EXTERN(_lm_heap_start);
+EXTERN(_lm_heap_end);
+
+SECTIONS
+{
+    .text :
+      {
+        __text_start__ = .;
+        /*
+         * STM32 vector table.  Leave this here.  Yes, really.
+         */
+        *(.stm32.interrupt_vector)
+
+        /*
+         * Program code and vague linking
+         */
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.plt)
+        *(.gnu.warning)
+        *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+        *(.gcc_except_table)
+        *(.eh_frame_hdr)
+        *(.eh_frame)
+
+        . = ALIGN(4);
+        KEEP(*(.init))
+
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(0x4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+      } > REGION_TEXT
+
+    /*
+     * End of text
+     */
+    .text.align :
+      {
+        . = ALIGN(8);
+        __text_end__ = .;
+      } > REGION_TEXT
+
+    /*
+     * .ARM.exidx exception unwinding; mandated by ARM's C++ ABI
+     */
+    __exidx_start = .;
+    .ARM.exidx :
+      {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+      } > REGION_RODATA
+    __exidx_end = .;
+
+    /*
+     * .data
+     */
+    .data :
+      {
+        __data_start__ = .;
+      	LONG(0)
+        . = ALIGN(8);
+
+        *(.got.plt) *(.got)
+        *(.data .data.* .gnu.linkonce.d.*)
+
+        . = ALIGN(8);
+        __data_end__ = .;
+      } > REGION_DATA AT> REGION_RODATA
+
+    /*
+     * Read-only data
+     */
+    .rodata :
+      {
+        *(.rodata .rodata.* .gnu.linkonce.r.*)
+        /* .USER_FLASH: We allow users to allocate into Flash here */
+        *(.USER_FLASH)
+        /* ROM image configuration; for C startup */
+        . = ALIGN(4);
+        _lm_rom_img_cfgp = .;
+        LONG(LOADADDR(.data));
+        /*
+         * Heap: Linker scripts may choose a custom heap by overriding
+         * _lm_heap_start and _lm_heap_end. Otherwise, the heap is in
+         * internal SRAM, beginning after .bss, and growing towards
+         * the stack.
+         *
+         * I'm shoving these here naively; there's probably a cleaner way
+         * to go about this. [mbolivar]
+         */
+        _lm_heap_start = DEFINED(_lm_heap_start) ? _lm_heap_start : _end;
+        _lm_heap_end   = DEFINED(_lm_heap_end) ? _lm_heap_end : __msp_init;
+      } > REGION_RODATA
+
+    /*
+     * .bss
+     */
+    .bss :
+      {
+        . = ALIGN(8);
+        __bss_start__ = .;
+        *(.bss .bss.* .gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN (8);
+        __bss_end__ = .;
+        _end = __bss_end__;
+      } > REGION_BSS
+
+    /*
+     * Debugging sections
+     */
+    .stab 0 (NOLOAD) : { *(.stab) }
+    .stabstr 0 (NOLOAD) : { *(.stabstr) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+
+    .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+    .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+    /DISCARD/ : { *(.note.GNU-stack) }
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/extra_libs.inc

@@ -0,0 +1,7 @@
+/*
+ * Extra archives needed by ARM's GCC ARM Embedded arm-none-eabi-
+ * releases (https://launchpad.net/gcc-arm-embedded/).
+ */
+
+/* This is for the provided newlib. */
+GROUP(libnosys.a)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/stm32f103z_dfu.ld

@@ -0,0 +1,29 @@
+/*
+ * libmaple linker script
+ *
+ * This build puts .text (and .rodata) in Flash, and
+ * .data/.bss/heap (of course) in SRAM, but links starting at the
+ * Flash and SRAM starting addresses (0x08000000 and 0x20000000
+ * respectively). This will wipe out a Maple bootloader if there's one
+ * on the board, so only use this if you know what you're doing.
+ *
+ * This build is perfectly usable for upload over SWD,
+ * the system memory bootloader, etc. The name is just a historical
+ * artifact.
+ */
+
+
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+  rom (rx)  : ORIGIN = 0x08002000, LENGTH = 504K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/stm32f103zc.ld

@@ -0,0 +1,27 @@
+/*
+ * libmaple linker script
+ *
+ * This build puts .text (and .rodata) in Flash, and
+ * .data/.bss/heap (of course) in SRAM, but links starting at the
+ * Flash and SRAM starting addresses (0x08000000 and 0x20000000
+ * respectively). This will wipe out a Maple bootloader if there's one
+ * on the board, so only use this if you know what you're doing.
+ *
+ * This build is perfectly usable for upload over SWD,
+ * the system memory bootloader, etc. The name is just a historical
+ * artifact.
+ */
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/stm32f103zd.ld

@@ -0,0 +1,27 @@
+/*
+ * libmaple linker script
+ *
+ * This build puts .text (and .rodata) in Flash, and
+ * .data/.bss/heap (of course) in SRAM, but links starting at the
+ * Flash and SRAM starting addresses (0x08000000 and 0x20000000
+ * respectively). This will wipe out a Maple bootloader if there's one
+ * on the board, so only use this if you know what you're doing.
+ *
+ * This build is perfectly usable for upload over SWD,
+ * the system memory bootloader, etc. The name is just a historical
+ * artifact.
+ */
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/stm32f103ze.ld

@@ -0,0 +1,29 @@
+/*
+ * libmaple linker script
+ *
+ * This build puts .text (and .rodata) in Flash, and
+ * .data/.bss/heap (of course) in SRAM, but links starting at the
+ * Flash and SRAM starting addresses (0x08000000 and 0x20000000
+ * respectively). This will wipe out a Maple bootloader if there's one
+ * on the board, so only use this if you know what you're doing.
+ *
+ * This build is perfectly usable for upload over SWD,
+ * the system memory bootloader, etc. The name is just a historical
+ * artifact.
+ */
+
+
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
+}
+
+/* Provide memory region aliases for common.inc */
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
+REGION_ALIAS("REGION_RODATA", rom);
+
+/* Let common.inc handle the real work. */
+INCLUDE common.inc

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/ld/vector_symbols.inc

@@ -0,0 +1,78 @@
+EXTERN(__msp_init)
+EXTERN(__exc_reset)
+EXTERN(__exc_nmi)
+EXTERN(__exc_hardfault)
+EXTERN(__exc_memmanage)
+EXTERN(__exc_busfault)
+EXTERN(__exc_usagefault)
+EXTERN(__stm32reservedexception7)
+EXTERN(__stm32reservedexception8)
+EXTERN(__stm32reservedexception9)
+EXTERN(__stm32reservedexception10)
+EXTERN(__exc_svc)
+EXTERN(__exc_debug_monitor)
+EXTERN(__stm32reservedexception13)
+EXTERN(__exc_pendsv)
+EXTERN(__exc_systick)
+
+EXTERN(__irq_wwdg)
+EXTERN(__irq_pvd)
+EXTERN(__irq_tamper)
+EXTERN(__irq_rtc)
+EXTERN(__irq_flash)
+EXTERN(__irq_rcc)
+EXTERN(__irq_exti0)
+EXTERN(__irq_exti1)
+EXTERN(__irq_exti2)
+EXTERN(__irq_exti3)
+EXTERN(__irq_exti4)
+EXTERN(__irq_dma1_channel1)
+EXTERN(__irq_dma1_channel2)
+EXTERN(__irq_dma1_channel3)
+EXTERN(__irq_dma1_channel4)
+EXTERN(__irq_dma1_channel5)
+EXTERN(__irq_dma1_channel6)
+EXTERN(__irq_dma1_channel7)
+EXTERN(__irq_adc)
+EXTERN(__irq_usb_hp_can_tx)
+EXTERN(__irq_usb_lp_can_rx0)
+EXTERN(__irq_can_rx1)
+EXTERN(__irq_can_sce)
+EXTERN(__irq_exti9_5)
+EXTERN(__irq_tim1_brk)
+EXTERN(__irq_tim1_up)
+EXTERN(__irq_tim1_trg_com)
+EXTERN(__irq_tim1_cc)
+EXTERN(__irq_tim2)
+EXTERN(__irq_tim3)
+EXTERN(__irq_tim4)
+EXTERN(__irq_i2c1_ev)
+EXTERN(__irq_i2c1_er)
+EXTERN(__irq_i2c2_ev)
+EXTERN(__irq_i2c2_er)
+EXTERN(__irq_spi1)
+EXTERN(__irq_spi2)
+EXTERN(__irq_usart1)
+EXTERN(__irq_usart2)
+EXTERN(__irq_usart3)
+EXTERN(__irq_exti15_10)
+EXTERN(__irq_rtcalarm)
+EXTERN(__irq_usbwakeup)
+
+EXTERN(__irq_tim8_brk)
+EXTERN(__irq_tim8_up)
+EXTERN(__irq_tim8_trg_com)
+EXTERN(__irq_tim8_cc)
+EXTERN(__irq_adc3)
+EXTERN(__irq_fsmc)
+EXTERN(__irq_sdio)
+EXTERN(__irq_tim5)
+EXTERN(__irq_spi3)
+EXTERN(__irq_uart4)
+EXTERN(__irq_uart5)
+EXTERN(__irq_tim6)
+EXTERN(__irq_tim7)
+EXTERN(__irq_dma2_channel1)
+EXTERN(__irq_dma2_channel2)
+EXTERN(__irq_dma2_channel3)
+EXTERN(__irq_dma2_channel4_5)

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/pins_arduino.h

@@ -0,0 +1,2 @@
+// API compatibility
+#include "variant.h"

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/variant.h

@@ -0,0 +1,17 @@
+#pragma once
+
+#define digitalPinToPort(P)        ( PIN_MAP[P].gpio_device )
+#define digitalPinToBitMask(P)     ( BIT(PIN_MAP[P].gpio_bit) )
+#define portOutputRegister(port)   ( &(port->regs->ODR) )
+#define portInputRegister(port)    ( &(port->regs->IDR) )
+
+#define portSetRegister(pin)       ( &(PIN_MAP[pin].gpio_device->regs->BSRR) )
+#define portClearRegister(pin)     ( &(PIN_MAP[pin].gpio_device->regs->BRR) )
+
+#define portConfigRegister(pin)    ( &(PIN_MAP[pin].gpio_device->regs->CRL) )
+
+static const uint8_t SS   = BOARD_SPI1_NSS_PIN;
+static const uint8_t SS1  = BOARD_SPI2_NSS_PIN;
+static const uint8_t MOSI = BOARD_SPI1_MOSI_PIN;
+static const uint8_t MISO = BOARD_SPI1_MISO_PIN;
+static const uint8_t SCK  = BOARD_SPI1_SCK_PIN;

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards.cpp

@@ -0,0 +1,225 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Perry Hung.
+ * Copyright (c) 2011, 2012 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file wirish/boards.cpp
+ * @brief init() and board routines.
+ *
+ * This file is mostly interesting for the init() function, which
+ * configures Flash, the core clocks, and a variety of other available
+ * peripherals on the board so the rest of Wirish doesn't have to turn
+ * things on before using them.
+ *
+ * Prior to returning, init() calls boardInit(), which allows boards
+ * to perform any initialization they need to. This file includes a
+ * weak no-op definition of boardInit(), so boards that don't need any
+ * special initialization don't have to define their own.
+ *
+ * How init() works is chip-specific. See the boards_setup.cpp files
+ * under e.g. wirish/stm32f1/, wirish/stmf32f2 for the details, but be
+ * advised: their contents are unstable, and can/will change without
+ * notice.
+ */
+
+#include <boards.h>
+#include <libmaple/libmaple_types.h>
+#include <libmaple/flash.h>
+#include <libmaple/nvic.h>
+#include <libmaple/systick.h>
+#include "boards_private.h"
+
+static void setup_flash(void);
+static void setup_clocks(void);
+static void setup_nvic(void);
+static void setup_adcs(void);
+static void setup_timers(void);
+
+/*
+ * Exported functions
+ */
+
+void init(void) {
+    setup_flash();
+    setup_clocks();
+    setup_nvic();
+    systick_init(SYSTICK_RELOAD_VAL);
+    wirish::priv::board_setup_gpio();
+    setup_adcs();
+    setup_timers();
+    wirish::priv::board_setup_usb();
+    wirish::priv::series_init();
+    boardInit();
+}
+
+/* Provide a default no-op boardInit(). */
+__weak void boardInit(void) {
+}
+
+/* You could farm this out to the files in boards/ if e.g. it takes
+ * too long to test on boards with lots of pins. */
+bool boardUsesPin(uint8 pin) {
+    for (int i = 0; i < BOARD_NR_USED_PINS; i++) {
+        if (pin == boardUsedPins[i]) {
+            return true;
+        }
+    }
+    return false;
+}
+
+/*
+ * Auxiliary routines
+ */
+
+static void setup_flash(void) {
+    // Turn on as many Flash "go faster" features as
+    // possible. flash_enable_features() just ignores any flags it
+    // can't support.
+    flash_enable_features(FLASH_PREFETCH | FLASH_ICACHE | FLASH_DCACHE);
+    // Configure the wait states, assuming we're operating at "close
+    // enough" to 3.3V.
+    flash_set_latency(FLASH_SAFE_WAIT_STATES);
+}
+
+static void setup_clocks(void) {
+    // Turn on HSI. We'll switch to and run off of this while we're
+    // setting up the main PLL.
+    rcc_turn_on_clk(RCC_CLK_HSI);
+
+    // Turn off and reset the clock subsystems we'll be using, as well
+    // as the clock security subsystem (CSS). Note that resetting CFGR
+    // to its default value of 0 implies a switch to HSI for SYSCLK.
+    RCC_BASE->CFGR = 0x00000000;
+    rcc_disable_css();
+    rcc_turn_off_clk(RCC_CLK_PLL);
+    rcc_turn_off_clk(RCC_CLK_HSE);
+    wirish::priv::board_reset_pll();
+    // Clear clock readiness interrupt flags and turn off clock
+    // readiness interrupts.
+    RCC_BASE->CIR = 0x00000000;
+#if !USE_HSI_CLOCK
+    // Enable HSE, and wait until it's ready.
+    rcc_turn_on_clk(RCC_CLK_HSE);
+    while (!rcc_is_clk_ready(RCC_CLK_HSE))
+        ;
+#endif
+    // Configure AHBx, APBx, etc. prescalers and the main PLL.
+    wirish::priv::board_setup_clock_prescalers();
+    rcc_configure_pll(&wirish::priv::w_board_pll_cfg);
+
+    // Enable the PLL, and wait until it's ready.
+    rcc_turn_on_clk(RCC_CLK_PLL);
+    while(!rcc_is_clk_ready(RCC_CLK_PLL))
+        ;
+
+    // Finally, switch to the now-ready PLL as the main clock source.
+    rcc_switch_sysclk(RCC_CLKSRC_PLL);
+}
+
+/*
+ * These addresses are where usercode starts when a bootloader is
+ * present. If no bootloader is present, the user NVIC usually starts
+ * at the Flash base address, 0x08000000.
+ */
+#if defined(BOOTLOADER_maple)
+	#define USER_ADDR_ROM 0x08005000
+#else
+	#define USER_ADDR_ROM 0x08000000
+#endif
+#define USER_ADDR_RAM 0x20000C00
+extern char __text_start__;
+
+static void setup_nvic(void) {
+
+nvic_init((uint32)VECT_TAB_ADDR, 0);
+
+/* Roger Clark. We now control nvic vector table in boards.txt using the build.vect paramater
+#ifdef VECT_TAB_FLASH
+    nvic_init(USER_ADDR_ROM, 0);
+#elif defined VECT_TAB_RAM
+    nvic_init(USER_ADDR_RAM, 0);
+#elif defined VECT_TAB_BASE
+    nvic_init((uint32)0x08000000, 0);
+#elif defined VECT_TAB_ADDR
+    // A numerically supplied value
+    nvic_init((uint32)VECT_TAB_ADDR, 0);
+#else
+    // Use the __text_start__ value from the linker script; this
+    // should be the start of the vector table.
+    nvic_init((uint32)&__text_start__, 0);
+#endif
+
+*/
+}
+
+static void adc_default_config(adc_dev *dev) {
+    adc_enable_single_swstart(dev);
+    adc_set_sample_rate(dev, wirish::priv::w_adc_smp);
+}
+
+static void setup_adcs(void) {
+    adc_set_prescaler(wirish::priv::w_adc_pre);
+    adc_foreach(adc_default_config);
+}
+
+static void timer_default_config(timer_dev *dev) {
+    timer_adv_reg_map *regs = (dev->regs).adv;
+    const uint16 full_overflow = 0xFFFF;
+    const uint16 half_duty = 0x8FFF;
+
+    timer_init(dev);
+    timer_pause(dev);
+
+    regs->CR1 = TIMER_CR1_ARPE;
+    regs->PSC = 1;
+    regs->SR = 0;
+    regs->DIER = 0;
+    regs->EGR = TIMER_EGR_UG;
+    switch (dev->type) {
+    case TIMER_ADVANCED:
+        regs->BDTR = TIMER_BDTR_MOE | TIMER_BDTR_LOCK_OFF;
+        // fall-through
+    case TIMER_GENERAL:
+        timer_set_reload(dev, full_overflow);
+        for (uint8 channel = 1; channel <= 4; channel++) {
+            if (timer_has_cc_channel(dev, channel)) {
+                timer_set_compare(dev, channel, half_duty);
+                timer_oc_set_mode(dev, channel, TIMER_OC_MODE_PWM_1,
+                                  TIMER_OC_PE);
+            }
+        }
+        // fall-through
+    case TIMER_BASIC:
+        break;
+    }
+
+    timer_generate_update(dev);
+    timer_resume(dev);
+}
+
+static void setup_timers(void) {
+    timer_foreach(timer_default_config);
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/boards_setup.cpp

@@ -0,0 +1,128 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2012 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+*****************************************************************************/
+
+/**
+ * @file wirish/stm32f1/boards_setup.cpp
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief STM32F1 chip setup.
+ *
+ * This file controls how init() behaves on the STM32F1. Be very
+ * careful when changing anything here. Many of these values depend
+ * upon each other.
+ */
+
+#include "boards_private.h"
+
+#include <libmaple/gpio.h>
+#include <libmaple/timer.h>
+
+#include <boards.h>
+#include <usb_serial.h>
+
+// Allow boards to provide a PLL multiplier. This is useful for
+// e.g. STM32F100 value line MCUs, which use slower multipliers.
+// (We're leaving the default to RCC_PLLMUL_9 for now, since that
+// works for F103 performance line MCUs, which is all that LeafLabs
+// currently officially supports).
+#ifndef BOARD_RCC_PLLMUL
+  #if !USE_HSI_CLOCK
+    #if F_CPU==128000000
+      #define BOARD_RCC_PLLMUL RCC_PLLMUL_16
+    #elif F_CPU==72000000
+      #define BOARD_RCC_PLLMUL RCC_PLLMUL_9
+    #elif F_CPU==48000000
+      #define BOARD_RCC_PLLMUL RCC_PLLMUL_6
+    #elif F_CPU==16000000
+      #define BOARD_RCC_PLLMUL RCC_PLLMUL_2
+    #endif
+  #else
+    #define BOARD_RCC_PLLMUL RCC_PLLMUL_16
+  #endif
+#endif
+
+namespace wirish {
+    namespace priv {
+
+        static stm32f1_rcc_pll_data pll_data = {BOARD_RCC_PLLMUL};
+#if !USE_HSI_CLOCK
+        __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSE, &pll_data};
+#else
+        __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSI_DIV_2, &pll_data};
+#endif
+        __weak adc_prescaler w_adc_pre = ADC_PRE_PCLK2_DIV_6;
+        __weak adc_smp_rate w_adc_smp = ADC_SMPR_55_5;
+
+        __weak void board_reset_pll(void) {
+            // TODO
+        }
+
+        __weak void board_setup_clock_prescalers(void) {
+            rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
+            rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
+            rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+            rcc_clk_disable(RCC_USB);
+#if F_CPU == 72000000
+            rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+#elif F_CPU == 48000000
+            rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1);
+#endif
+        }
+
+        __weak void board_setup_gpio(void) {
+            /**
+             * PA14 is a pull up pin. But, some V5 boards it start with LOW state! And just behave properly when the Z- PROBE is actived at least once.
+             * So, if the sensor isnt actived, the PA14 pin will be forever in LOW state, telling Marlin the probe IS ALWAYS ACTIVE, that isnt the case!
+             * Chitu original firmware seems to start with every pullup PIN with HIGH to workaround this.
+             * So we are doing the same here.
+             * This hack only works if applied *before* the GPIO Init, it's the reason I did it here.
+             */
+            #ifdef CHITU_V5_Z_MIN_BUGFIX
+              GPIOA->regs->BSRR = (1U << PA14);
+            #endif
+            gpio_init_all();
+        }
+
+        __weak void board_setup_usb(void) {
+#ifdef SERIAL_USB
+#ifdef GENERIC_BOOTLOADER
+          // Reset the USB interface on generic boards - developed by Victor PV
+          gpio_set_mode(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit, GPIO_OUTPUT_PP);
+          gpio_write_bit(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit,0);
+
+          for (volatile unsigned int i = 0; i < 512; i++); // Only small delay seems to be needed, and USB pins will get configured in Serial.begin
+          gpio_set_mode(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit, GPIO_INPUT_FLOATING);
+#endif
+          Serial.begin(); // Roger Clark. Changed SerialUSB to Serial for Arduino sketch compatibility
+#endif
+        }
+
+        __weak void series_init(void) {
+            // Initialize AFIO here, too, so peripheral remaps and external
+            // interrupts work out of the box.
+            afio_init();
+        }
+    }
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/start_c.c

@@ -0,0 +1,144 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/*
+ * This file is a modified version of a file obtained from
+ * CodeSourcery Inc. (now part of Mentor Graphics Corp.), in which the
+ * following text appeared:
+ *
+ * Copyright (c) 2006, 2007 CodeSourcery Inc
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include <stddef.h>
+
+#include <libmaple/rcc.h>
+#include <libmaple/libmaple.h>
+#include <libmaple/bitband.h>
+
+#include "rcc_private.h"
+
+#include <libmaple/usart.h>
+#include <libmaple/gpio.h>
+#include "usart_private.h"
+
+#include <libmaple/sdio.h>
+#include <string.h>
+
+extern void __libc_init_array(void);
+
+extern int main(int, char**, char**);
+
+extern void exit(int) __attribute__((noreturn, weak));
+
+/* The linker must ensure that these are at least 4-byte aligned. */
+extern char __data_start__, __data_end__;
+extern char __bss_start__, __bss_end__;
+
+struct rom_img_cfg {
+    int *img_start;
+};
+
+extern char _lm_rom_img_cfgp;
+extern void __lm_error();
+extern void timer_disable_all();
+
+    /* Turn off ADC */
+extern void adc_disable_all();
+
+    /* Turn off all USARTs */
+extern void usart_disable_all();
+extern void DisableEverything();
+
+void __attribute__((noreturn)) start_c(void) {
+    struct rom_img_cfg *img_cfg = (struct rom_img_cfg*)&_lm_rom_img_cfgp;
+    int *src = img_cfg->img_start;
+    int *dst = (int*)&__data_start__;
+    int exit_code;
+
+    asm("CPSID I");
+    /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
+    /* Set HSION bit */
+    RCC_BASE->CR |= 0x00000001U;
+
+    /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
+    RCC_BASE->CFGR &= 0xF0FF0000U;
+
+    /* Reset HSEON, CSSON and PLLON bits */
+    RCC_BASE->CR &= 0xFEF6FFFFU;
+
+    /* Reset HSEBYP bit */
+    RCC_BASE->CR &= 0xFFFBFFFFU;
+
+    /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
+    RCC_BASE->CFGR &= 0xFF80FFFFU;
+
+    /* Disable all interrupts and clear pending bits  */
+    RCC_BASE->CIR = 0x009F0000U;
+
+    USART1_BASE->CR1 = 0;
+    USART1_BASE->CR2 = 0;
+    USART1_BASE->CR3 = 0;
+
+    memset(SDIO_BASE, 0, sizeof(sdio_reg_map));
+    asm("CPSIE I");
+
+    /* Initialize .data, if necessary. */
+    if (src != dst) {
+        int *end = (int*)&__data_end__;
+        while (dst < end) {
+            *dst++ = *src++;
+        }
+    }
+
+    /* Zero .bss. */
+    dst = (int*)&__bss_start__;
+    while (dst < (int*)&__bss_end__) {
+        *dst++ = 0;
+    }
+
+    /* Run initializers. */
+    __libc_init_array();
+
+    /* Jump to main. */
+    exit_code = main(0, 0, 0);
+    if (exit) {
+        exit(exit_code);
+    }
+
+    /* If exit is NULL, make sure we don't return. */
+    for (;;)
+        continue;
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/CHITU_F103/wirish/syscalls.c

@@ -0,0 +1,176 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Perry Hung.
+ * Copyright (c) 2011, 2012 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file wirish/syscalls.c
+ * @brief newlib stubs
+ *
+ * Low level system routines used by newlib for basic I/O and memory
+ * allocation. You can override most of these.
+ */
+
+#include <libmaple/libmaple.h>
+
+#include <sys/stat.h>
+#include <errno.h>
+#include <stddef.h>
+
+/* If CONFIG_HEAP_START (or CONFIG_HEAP_END) isn't defined, then
+ * assume _lm_heap_start (resp. _lm_heap_end) is appropriately set by
+ * the linker */
+#ifndef CONFIG_HEAP_START
+extern char _lm_heap_start;
+#define CONFIG_HEAP_START               ((void *)&_lm_heap_start)
+#endif
+#ifndef CONFIG_HEAP_END
+extern char _lm_heap_end;
+#define CONFIG_HEAP_END                 ((void *)&_lm_heap_end)
+#endif
+
+/*
+ * _sbrk -- Increment the program break.
+ *
+ * Get incr bytes more RAM (for use by the heap).  malloc() and
+ * friends call this function behind the scenes.
+ */
+void *_sbrk(int incr) {
+    static void * pbreak = NULL; /* current program break */
+    void * ret;
+
+    if (pbreak == NULL) {
+        pbreak = CONFIG_HEAP_START;
+    }
+
+    if ((CONFIG_HEAP_END - pbreak < incr) ||
+        (pbreak - CONFIG_HEAP_START < -incr)) {
+        errno = ENOMEM;
+        return (void *)-1;
+    }
+
+    ret = pbreak;
+    pbreak += incr;
+    return ret;
+}
+
+__weak int _open(const char *path __attribute__((unused)), int flags __attribute__((unused)), ...) {
+    return 1;
+}
+
+__weak int _close(int fd __attribute__((unused))) {
+    return 0;
+}
+
+__weak int _fstat(int fd __attribute__((unused)), struct stat *st) {
+    st->st_mode = S_IFCHR;
+    return 0;
+}
+
+__weak int _isatty(int fd __attribute__((unused))) {
+    return 1;
+}
+
+__weak int isatty(int fd __attribute__((unused))) {
+    return 1;
+}
+
+__weak int _lseek(int fd __attribute__((unused)), off_t pos __attribute__((unused)), int whence __attribute__((unused))) {
+    return -1;
+}
+
+__weak unsigned char getch(void) {
+    return 0;
+}
+
+
+__weak int _read(int fd __attribute__((unused)), char *buf, size_t cnt __attribute__((unused))) {
+    *buf = getch();
+
+    return 1;
+}
+
+__weak void putch(unsigned char c __attribute__((unused))) {
+}
+
+__weak void cgets(char *s, int bufsize) {
+    char *p;
+    int c;
+    int i;
+
+    for (i = 0; i < bufsize; i++) {
+        *(s+i) = 0;
+    }
+//    memset(s, 0, bufsize);
+
+    p = s;
+
+    for (p = s; p < s + bufsize-1;) {
+        c = getch();
+        switch (c) {
+        case '\r' :
+        case '\n' :
+            putch('\r');
+            putch('\n');
+            *p = '\n';
+            return;
+
+        case '\b' :
+            if (p > s) {
+                *p-- = 0;
+                putch('\b');
+                putch(' ');
+                putch('\b');
+            }
+            break;
+
+        default :
+            putch(c);
+            *p++ = c;
+            break;
+        }
+    }
+    return;
+}
+
+__weak int _write(int fd __attribute__((unused)), const char *buf, size_t cnt) {
+    int i;
+
+    for (i = 0; i < cnt; i++)
+        putch(buf[i]);
+
+    return cnt;
+}
+
+/* Override fgets() in newlib with a version that does line editing */
+__weak char *fgets(char *s, int bufsize, void *f __attribute__((unused))) {
+    cgets(s, bufsize);
+    return s;
+}
+
+__weak void _exit(int exitcode __attribute__((unused))) {
+    while (1)
+        ;
+}

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/FLY_F407ZG/PeripheralPins.c

@@ -0,0 +1,419 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
+ */
+#include <Arduino.h>
+#include <PeripheralPins.h>
+
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used per default.
+ *       If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+const PinMap PinMap_ADC[] = {
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
+  //  {PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
+  //  {PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+  //  {PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
+  //  {PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
+  //  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
+  {PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
+  //  {PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
+  //  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
+  //  {PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
+  {PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
+  //  {PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
+  //  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
+  {PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
+  //  {PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
+  //  {PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
+  //  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
+  {PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
+  //  {PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
+  //  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
+  //  {PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
+  {PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
+  //  {PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
+  //  {PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
+  //  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
+  {PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
+  //  {PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
+  //  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
+  //  {PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
+  {PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
+  //  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
+  {PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
+  //  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
+  {PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
+  {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9
+  {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14
+  {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15
+  {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
+  {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
+  {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
+  //  {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
+  {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
+  {NC,    NP,    0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+const PinMap PinMap_DAC[] = {
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+  {NC,    NP,    0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SDA[] = {
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+const PinMap PinMap_PWM[] = {
+  {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //  {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  //  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  //  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  //  {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  //  {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  //  {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  {PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //  {PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  //  {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  //  {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  //  {PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  //  {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  //  {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  //  {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  //  {PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  //  {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  //  {PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  //  {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+  {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+  {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  {PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  {PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+  {PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+  {PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  {PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_TX[] = {
+  {PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  //  {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_RX[] = {
+  {PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  //  {PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_RTS[] = {
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+const PinMap PinMap_UART_CTS[] = {
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+const PinMap PinMap_CAN_RD[] = {
+  {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {PB_5,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+  {PB_8,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+  {PD_0,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_CAN_MODULE_ENABLED
+const PinMap PinMap_CAN_TD[] = {
+  {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {PB_6,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+  {PB_9,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+  {PD_1,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+  {NC,    NP,    0}
+};
+#endif
+
+//*** ETHERNET ***
+
+#ifdef HAL_ETH_MODULE_ENABLED
+const PinMap PinMap_Ethernet[] = {
+  {PA_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
+  {PA_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
+  {PA_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
+  {PA_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
+  {PA_7,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
+  {PB_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
+  {PB_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
+  {PB_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+  {PB_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+  {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
+  {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+  {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+  {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+  {PC_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
+  {PC_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
+  {PC_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
+  {PC_4,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
+  {PC_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
+  {PE_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+  {PG_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+  {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+  {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+  {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+  {NC,    NP,    0}
+};
+#endif
+
+//*** No QUADSPI ***
+
+//*** USB ***
+
+#ifdef HAL_PCD_MODULE_ENABLED
+const PinMap PinMap_USB_OTG_FS[] = {
+  //  {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
+  //  {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
+  //  {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,    0}
+};
+#endif
+
+#ifdef HAL_PCD_MODULE_ENABLED
+const PinMap PinMap_USB_OTG_HS[] = {
+#ifdef USE_USB_HS_IN_FS
+  {PA_4,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+  {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
+  {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
+#else
+  {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
+  {PA_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
+  {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
+  {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
+  {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
+  {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
+  {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
+  {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
+  {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
+  {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
+#endif /* USE_USB_HS_IN_FS */
+  {NC,    NP,    0}
+};
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h

@@ -0,0 +1,50 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+  USB_OTG_FS_SOF      = PA_8,
+  USB_OTG_FS_VBUS     = PA_9,
+  USB_OTG_FS_ID       = PA_10,
+  USB_OTG_FS_DM       = PA_11,
+  USB_OTG_FS_DP       = PA_12,
+  USB_OTG_HS_ULPI_D0  = PA_3,
+  USB_OTG_HS_SOF      = PA_4,
+  USB_OTG_HS_ULPI_CK  = PA_5,
+  USB_OTG_HS_ULPI_D1  = PB_0,
+  USB_OTG_HS_ULPI_D2  = PB_1,
+  USB_OTG_HS_ULPI_D7  = PB_5,
+  USB_OTG_HS_ULPI_D3  = PB_10,
+  USB_OTG_HS_ULPI_D4  = PB_11,
+  USB_OTG_HS_ID       = PB_12,
+  USB_OTG_HS_ULPI_D5  = PB_12,
+  USB_OTG_HS_ULPI_D6  = PB_13,
+  USB_OTG_HS_VBUS     = PB_13,
+  USB_OTG_HS_DM       = PB_14,
+  USB_OTG_HS_DP       = PB_15,
+  USB_OTG_HS_ULPI_STP = PC_0,
+  USB_OTG_HS_ULPI_DIR = PC_2,
+  USB_OTG_HS_ULPI_NXT = PC_3,
+#endif

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/FLY_F407ZG/ldscript.ld

@@ -0,0 +1,207 @@
+/*
+*****************************************************************************
+**
+
+**  File        : lscript.ld
+**
+**  Abstract    : Linker script for STM32F407(VZ)(EG)Tx Device with
+**                512/1024KByte FLASH, 128KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of Ac6 nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
+FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 1024K -32K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
+  * If initialized variables will be placed in this section,
+  * the startup code needs to be modified to copy the init-values.
+  */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(4);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(4);
+  } >RAM
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+

Marlin-bugfix-2.0.x-230620-bltouch-skr/buildroot/share/PlatformIO/variants/FLY_F407ZG/variant.cpp

@@ -0,0 +1,210 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2017, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+const PinName digitalPin[] = {
+ PB_12,
+ PB_13,
+ PB_14,
+ PB_15,
+ PD_8,
+ PD_9,
+ PD_10,
+ PD_11,
+ PD_12,
+ PD_13,
+ PD_14,
+ PD_15,
+ PG_2,
+ PG_3,
+ PG_4,
+ PG_5,
+ PG_6,
+ PG_7,
+ PG_8,
+ PC_6,
+ PC_7,
+ PC_8,
+ PC_9,
+ PA_8,
+ PA_9,
+ PA_10,
+ PA_11,
+ PA_12,
+ PA_13,
+ PA_14,
+ PA_15,
+ PC_10,
+ PC_11,
+ PC_12,
+ PD_0,
+ PD_1,
+ PD_2,
+ PD_3,
+ PD_4,
+ PD_5,
+ PD_6,
+ PD_7,
+ PG_9,
+ PG_10,
+ PG_11,
+ PG_12,
+ PG_13,
+ PG_14,
+ PG_15,
+ PB_3,
+ PB_4,
+ PB_5,
+ PB_6,
+ PB_7,
+ PB_8,
+ PB_9,
+ PB_10,
+ PB_11,
+ PE_14,
+ PE_15,
+ PE_12,
+ PE_13,
+ PE_10,
+ PE_11,
+ PE_8,
+ PE_9,
+ PG_1,
+ PE_7,
+ PF_15,
+ PG_0,
+ PF_13,
+ PF_14,
+ PF_11,
+ PF_12,
+ PB_2,
+ PB_1,
+ PC_5,
+ PB_0,
+ PA_7,
+ PC_4,
+ PA_5,
+ PA_6,
+ PA_3,
+ PA_4,
+ PA_1,
+ PA_2,
+ PC_3,
+ PA_0,
+ PC_1,
+ PC_2,
+ PC_0,
+ PF_8,
+ PF_6,
+ PF_7,
+ PF_9,
+ PF_10,
+ PF_4,
+ PF_5,
+ PF_2,
+ PF_3,
+ PF_0,
+ PF_1,
+ PE_6,
+ PC_13,
+ PE_4,
+ PE_5,
+ PE_2,
+ PE_3,
+ PE_0,
+ PE_1,
+ PC_14,
+ PC_15,
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config(void)
+{
+
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+  /**Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 336;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+
+  /**Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+    _Error_Handler(__FILE__, __LINE__);
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif